From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 39386 invoked by alias); 6 Jul 2015 12:12:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 39321 invoked by uid 89); 6 Jul 2015 12:12:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.8 required=5.0 tests=AWL,BAYES_50,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: paperclip.tbsaunde.org Received: from tbsaunde.org (HELO paperclip.tbsaunde.org) (66.228.47.254) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 06 Jul 2015 12:12:00 +0000 Received: from iceball.corp.tor1.mozilla.com (unknown [23.233.68.71]) by paperclip.tbsaunde.org (Postfix) with ESMTPSA id 92401C0AA for ; Mon, 6 Jul 2015 12:11:58 +0000 (UTC) From: tbsaunde+gcc@tbsaunde.org To: gcc-patches@gcc.gnu.org Subject: [PATCH 3/7] always define SHORT_IMMEDIATES_SIGN_EXTEND Date: Mon, 06 Jul 2015 12:12:00 -0000 Message-Id: <1436184690-30134-4-git-send-email-tbsaunde+gcc@tbsaunde.org> In-Reply-To: <1436184690-30134-1-git-send-email-tbsaunde+gcc@tbsaunde.org> References: <1436184690-30134-1-git-send-email-tbsaunde+gcc@tbsaunde.org> X-IsSubscribed: yes X-SW-Source: 2015-07/txt/msg00321.txt.bz2 From: Trevor Saunders gcc/ChangeLog: 2015-07-06 Trevor Saunders * combine.c (update_rsp_from_reg_equal): Don't check if SHORT_IMMEDIATES_SIGN_EXTEND is defined. (reg_nonzero_bits_for_combine): Likewise. * config/alpha/alpha.h: Define SHORT_IMMEDIATES_SIGN_EXTEND to 1. * config/frv/frv.h: Likewise. * config/lm32/lm32.h: Likewise. * config/mep/mep.h: Likewise. * config/mips/mips.h: Likewise. * config/rs6000/rs6000.h: Likewise. * config/sh/sh.h: Likewise. * config/tilegx/tilegx.h (enum reg_class): Likewise. * config/tilepro/tilepro.h: Likewise. * defaults.h: Add default for SHORT_IMMEDIATES_SIGN_EXTEND. * doc/tm.texi: Regenerate. * doc/tm.texi.in: Adjust. * rtlanal.c (nonzero_bits1): Likewise. --- gcc/combine.c | 21 ++++++++++----------- gcc/config/alpha/alpha.h | 2 +- gcc/config/frv/frv.h | 2 +- gcc/config/lm32/lm32.h | 2 +- gcc/config/mep/mep.h | 2 +- gcc/config/mips/mips.h | 2 +- gcc/config/rs6000/rs6000.h | 2 +- gcc/config/sh/sh.h | 2 +- gcc/config/tilegx/tilegx.h | 2 +- gcc/config/tilepro/tilepro.h | 2 +- gcc/defaults.h | 4 ++++ gcc/doc/tm.texi | 2 +- gcc/doc/tm.texi.in | 2 +- gcc/rtlanal.c | 4 +--- 14 files changed, 26 insertions(+), 25 deletions(-) diff --git a/gcc/combine.c b/gcc/combine.c index a02e755..6935934 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1630,7 +1630,6 @@ setup_incoming_promotions (rtx_insn *first) } } -#ifdef SHORT_IMMEDIATES_SIGN_EXTEND /* If MODE has a precision lower than PREC and SRC is a non-negative constant that would appear negative in MODE, sign-extend SRC for use in nonzero_bits because some machines (maybe most) will actually do the sign-extension and @@ -1650,7 +1649,6 @@ sign_extend_short_imm (rtx src, machine_mode mode, unsigned int prec) return src; } -#endif /* Update RSP for pseudo-register X from INSN's REG_EQUAL note (if one exists) and SET. */ @@ -1667,11 +1665,12 @@ update_rsp_from_reg_equal (reg_stat_type *rsp, rtx_insn *insn, const_rtx set, if (reg_equal_note) reg_equal = XEXP (reg_equal_note, 0); -#ifdef SHORT_IMMEDIATES_SIGN_EXTEND - src = sign_extend_short_imm (src, GET_MODE (x), BITS_PER_WORD); - if (reg_equal) - reg_equal = sign_extend_short_imm (reg_equal, GET_MODE (x), BITS_PER_WORD); -#endif + if (SHORT_IMMEDIATES_SIGN_EXTEND) + { + src = sign_extend_short_imm (src, GET_MODE (x), BITS_PER_WORD); + if (reg_equal) + reg_equal = sign_extend_short_imm (reg_equal, GET_MODE (x), BITS_PER_WORD); + } /* Don't call nonzero_bits if it cannot change anything. */ if (rsp->nonzero_bits != ~(unsigned HOST_WIDE_INT) 0) @@ -9818,10 +9817,10 @@ reg_nonzero_bits_for_combine (const_rtx x, machine_mode mode, if (tem) { -#ifdef SHORT_IMMEDIATES_SIGN_EXTEND - tem = sign_extend_short_imm (tem, GET_MODE (x), - GET_MODE_PRECISION (mode)); -#endif + if (SHORT_IMMEDIATES_SIGN_EXTEND) + tem = sign_extend_short_imm (tem, GET_MODE (x), + GET_MODE_PRECISION (mode)); + return tem; } else if (nonzero_sign_valid && rsp->nonzero_bits) diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 8d2ab23..c39f103 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -897,7 +897,7 @@ do { \ #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) /* Define if loading short immediate values into registers sign extends. */ -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h index 2d4cbdd..a96f201b 100644 --- a/gcc/config/frv/frv.h +++ b/gcc/config/frv/frv.h @@ -1899,7 +1899,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE) #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND /* Define if loading short immediate values into registers sign extends. */ -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 /* The maximum number of bytes that a single instruction can move quickly from memory to memory. */ diff --git a/gcc/config/lm32/lm32.h b/gcc/config/lm32/lm32.h index d284703..9872860 100644 --- a/gcc/config/lm32/lm32.h +++ b/gcc/config/lm32/lm32.h @@ -525,7 +525,7 @@ do { \ #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 #define MOVE_MAX UNITS_PER_WORD #define MAX_MOVE_MAX 4 diff --git a/gcc/config/mep/mep.h b/gcc/config/mep/mep.h index 861189d..8fee273 100644 --- a/gcc/config/mep/mep.h +++ b/gcc/config/mep/mep.h @@ -765,7 +765,7 @@ typedef struct #define WORD_REGISTER_OPERATIONS #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 #define MOVE_MAX 4 diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index bceef31..33469be 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1626,7 +1626,7 @@ FP_ASM_SPEC "\ #define POINTERS_EXTEND_UNSIGNED false /* Define if loading short immediate values into registers sign extends. */ -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 /* The [d]clz instructions have the natural values at 0. */ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index ef8ff38..3bd2048 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2046,7 +2046,7 @@ do { \ #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND /* Define if loading short immediate values into registers sign extends. */ -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 3078880..c4947a6 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -1827,7 +1827,7 @@ struct sh_args { : (MODE) != SImode ? SIGN_EXTEND : UNKNOWN) /* Define if loading short immediate values into registers sign extends. */ -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 /* Nonzero if access to memory by bytes is no faster than for words. */ #define SLOW_BYTE_ACCESS 1 diff --git a/gcc/config/tilegx/tilegx.h b/gcc/config/tilegx/tilegx.h index 5fa10b3..7c3995a 100644 --- a/gcc/config/tilegx/tilegx.h +++ b/gcc/config/tilegx/tilegx.h @@ -386,7 +386,7 @@ enum reg_class #define SHIFT_COUNT_TRUNCATED 0 -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 /* We represent all SI values as sign-extended DI values in registers. */ diff --git a/gcc/config/tilepro/tilepro.h b/gcc/config/tilepro/tilepro.h index f2b7b16..970135a 100644 --- a/gcc/config/tilepro/tilepro.h +++ b/gcc/config/tilepro/tilepro.h @@ -346,7 +346,7 @@ enum reg_class #define SHIFT_COUNT_TRUNCATED 1 -#define SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 1 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 diff --git a/gcc/defaults.h b/gcc/defaults.h index ea10eb9..9dc59d2 100644 --- a/gcc/defaults.h +++ b/gcc/defaults.h @@ -1265,6 +1265,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_SUPPORTS_WIDE_INT 0 #endif +#ifndef SHORT_IMMEDIATES_SIGN_EXTEND +#define SHORT_IMMEDIATES_SIGN_EXTEND 0 +#endif + #ifdef GCC_INSN_FLAGS_H /* Dependent default target macro definitions diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index a16cd92..620fc2a 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -10410,7 +10410,7 @@ is larger then @var{mem_mode} but still smaller than @code{word_mode}. @end defmac @defmac SHORT_IMMEDIATES_SIGN_EXTEND -Define this macro if loading short immediate values into registers sign +Define this macro to 1 if loading short immediate values into registers sign extends. @end defmac diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 93fb41c..59aa589 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -7534,7 +7534,7 @@ is larger then @var{mem_mode} but still smaller than @code{word_mode}. @end defmac @defmac SHORT_IMMEDIATES_SIGN_EXTEND -Define this macro if loading short immediate values into registers sign +Define this macro to 1 if loading short immediate values into registers sign extends. @end defmac diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 86b3b62..2071b6b 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -4108,14 +4108,12 @@ nonzero_bits1 (const_rtx x, machine_mode mode, const_rtx known_x, } case CONST_INT: -#ifdef SHORT_IMMEDIATES_SIGN_EXTEND /* If X is negative in MODE, sign-extend the value. */ - if (INTVAL (x) > 0 + if (SHORT_IMMEDIATES_SIGN_EXTEND && INTVAL (x) > 0 && mode_width < BITS_PER_WORD && (UINTVAL (x) & ((unsigned HOST_WIDE_INT) 1 << (mode_width - 1))) != 0) return UINTVAL (x) | (HOST_WIDE_INT_M1U << mode_width); -#endif return UINTVAL (x); -- 2.4.0