From: Richard Henderson <rth@redhat.com>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH 15/15] alpha: Remove alpha_emit_set_long_const
Date: Wed, 12 Aug 2015 01:12:00 -0000 [thread overview]
Message-ID: <1439341904-9345-16-git-send-email-rth@redhat.com> (raw)
In-Reply-To: <1439341904-9345-1-git-send-email-rth@redhat.com>
It's functionality now folded into alpha_emit_set_const.
---
* config/alpha/alpha.c (alpha_emit_set_long_const): Remove.
(alpha_split_const_mov): Don't call it.
(alpha_expand_epilogue): Likewise.
(alpha_output_mi_thunk_osf): Likewise.
---
gcc/config/alpha/alpha.c | 76 ++++++++----------------------------------------
1 file changed, 12 insertions(+), 64 deletions(-)
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index cc25250..c0d8900 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -2045,49 +2045,6 @@ alpha_emit_set_const (rtx target, machine_mode origmode,
return target;
}
-/* Having failed to find a 3 insn sequence in alpha_emit_set_const,
- fall back to a straight forward decomposition. We do this to avoid
- exponential run times encountered when looking for longer sequences
- with alpha_emit_set_const. */
-
-static rtx
-alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1)
-{
- HOST_WIDE_INT d1, d2, d3, d4;
-
- /* Decompose the entire word */
-
- d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
- c1 -= d1;
- d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
- c1 = (c1 - d2) >> 32;
- d3 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
- c1 -= d3;
- d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
- gcc_assert (c1 == d4);
-
- /* Construct the high word */
- if (d4)
- {
- emit_move_insn (target, GEN_INT (d4));
- if (d3)
- emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d3)));
- }
- else
- emit_move_insn (target, GEN_INT (d3));
-
- /* Shift it into place */
- emit_move_insn (target, gen_rtx_ASHIFT (DImode, target, GEN_INT (32)));
-
- /* Add in the low bits. */
- if (d2)
- emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d2)));
- if (d1)
- emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
-
- return target;
-}
-
/* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits. */
static HOST_WIDE_INT
@@ -2177,16 +2134,10 @@ alpha_legitimate_constant_p (machine_mode mode, rtx x)
bool
alpha_split_const_mov (machine_mode mode, rtx *operands)
{
- HOST_WIDE_INT i0;
- rtx temp = NULL_RTX;
-
- i0 = alpha_extract_integer (operands[1]);
-
- temp = alpha_emit_set_const (operands[0], mode, i0, 3);
-
- if (!temp && TARGET_BUILD_CONSTANTS)
- temp = alpha_emit_set_long_const (operands[0], i0);
-
+ HOST_WIDE_INT i0 = alpha_extract_integer (operands[1]);
+ rtx temp = alpha_emit_set_const (operands[0], mode, i0,
+ TARGET_BUILD_CONSTANTS
+ ? genimm_alpha::max_cost : 3);
if (temp)
{
if (!rtx_equal_p (operands[0], temp))
@@ -8220,14 +8171,10 @@ alpha_expand_epilogue (void)
else
{
rtx tmp = gen_rtx_REG (DImode, 23);
- sp_adj2 = alpha_emit_set_const (tmp, DImode, frame_size, 3);
- if (!sp_adj2)
- {
- /* We can't drop new things to memory this late, afaik,
- so build it up by pieces. */
- sp_adj2 = alpha_emit_set_long_const (tmp, frame_size);
- gcc_assert (sp_adj2);
- }
+ /* We can't drop new things to memory this late, afaik,
+ so force the constant to be built by pieces. */
+ sp_adj2 = alpha_emit_set_const (tmp, DImode, frame_size,
+ genimm_alpha::max_cost);
}
/* From now on, things must be in order. So emit blockages. */
@@ -8352,7 +8299,8 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
}
else
{
- rtx tmp = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 0), delta);
+ rtx tmp = alpha_emit_set_const (gen_rtx_REG (Pmode, 0), Pmode, delta,
+ genimm_alpha::max_cost);
emit_insn (gen_adddi3 (this_rtx, this_rtx, tmp));
}
@@ -8373,8 +8321,8 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
}
else
{
- tmp2 = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 1),
- vcall_offset);
+ tmp2 = alpha_emit_set_const (gen_rtx_REG (Pmode, 1), Pmode,
+ vcall_offset, genimm_alpha::max_cost);
emit_insn (gen_adddi3 (tmp, tmp, tmp2));
lo = 0;
}
--
2.4.3
next prev parent reply other threads:[~2015-08-12 1:12 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-12 1:11 [PATCH ppc64,aarch64,alpha 00/15] Improve backend constant generation Richard Henderson
2015-08-12 1:11 ` [PATCH 05/15] rs6000: Move constant via mask into build_set_const_data Richard Henderson
2015-08-12 1:11 ` [PATCH 01/15] rs6000: Split out rs6000_is_valid_and_mask_wide Richard Henderson
2015-08-12 13:24 ` Segher Boessenkool
2015-08-12 15:50 ` Richard Henderson
2015-08-13 2:29 ` Segher Boessenkool
2015-08-12 1:12 ` [PATCH 10/15] rs6000: Use rotldi in constant generation Richard Henderson
2015-08-12 1:12 ` [PATCH 14/15] alpha: Split out alpha_cost_set_const Richard Henderson
2015-08-12 1:12 ` [PATCH 07/15] rs6000: Generalize left shift in constant generation Richard Henderson
2015-08-12 1:12 ` [PATCH 03/15] rs6000: Tidy num_insns_constant vs CONST_DOUBLE Richard Henderson
2015-08-12 1:12 ` [PATCH 06/15] rs6000: Use rldiwi in constant construction Richard Henderson
2015-08-12 14:02 ` Segher Boessenkool
2015-08-12 15:55 ` Richard Henderson
2015-08-13 2:43 ` Segher Boessenkool
2015-08-13 19:01 ` Mike Stump
2015-08-13 20:30 ` Joseph Myers
2015-08-12 1:12 ` [PATCH 11/15] aarch64: Use hashing infrastructure for generating constants Richard Henderson
2015-08-12 1:12 ` [PATCH 08/15] rs6000: Generalize masking in constant generation Richard Henderson
2015-08-12 1:12 ` [PATCH 02/15] rs6000: Make num_insns_constant_wide static Richard Henderson
2015-08-12 1:12 ` [PATCH 04/15] rs6000: Implement set_const_data infrastructure Richard Henderson
2015-08-12 13:53 ` Segher Boessenkool
2015-08-12 1:12 ` [PATCH 09/15] rs6000: Use xoris in constant construction Richard Henderson
2015-08-12 1:12 ` [PATCH 12/15] aarch64: Test for duplicated 32-bit halves Richard Henderson
2015-08-12 1:12 ` Richard Henderson [this message]
2015-08-12 1:12 ` [PATCH 13/15] alpha: Use hashing infrastructure for generating constants Richard Henderson
2015-08-12 8:32 ` [PATCH ppc64,aarch64,alpha 00/15] Improve backend constant generation Richard Earnshaw
2015-08-12 8:43 ` Richard Earnshaw
2015-08-12 9:02 ` Richard Earnshaw
2015-08-12 15:45 ` Richard Henderson
2015-08-12 8:32 ` Segher Boessenkool
2015-08-12 15:32 ` Richard Henderson
2015-08-13 3:07 ` Segher Boessenkool
2015-08-13 5:36 ` Segher Boessenkool
2015-08-13 3:10 ` Segher Boessenkool
2015-08-13 11:32 ` David Edelsohn
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