Re: [PATCH] Convert SPARC to LRA

[Peter Bergner <bergner@vnet.ibm.com>]

On Mon, 2015-09-28 at 15:28 -0500, Segher Boessenkool wrote:
> On Mon, Sep 28, 2015 at 03:23:37PM -0400, Vladimir Makarov wrote:
> > There are more ports using reload than LRA now.  Even some major ports 
> > (e.g. ppc64) did not switch to LRA.
> 
> There still are some failures in the testsuite (ICEs even) so we're
> not there yet.

I've started to looking through the failures with a target of getting POWER
converted to LRA before the switch to stage3.  From a quick scan, I see what
looks like two different ICEs on multiple tests and one wrong code gen issue.

The first ICE seems to be due to a conversion to long double and LRA ends
up going into a infinite loop spilling things until it hits a threshold and
quits with an ICE.  I haven't spent enough time to determine whether this
is a LRA or port issue yet though.  The simplest test case I have at the
moment is:

bergner@genoa:~/gcc/BUGS/LRA/20011123-1$ cat bug2.i
void
foo (long double *ldb1, double *db1)
{
  *ldb1 = *db1;
}
bergner@genoa:~/gcc/BUGS/LRA/20011123-1$ /home/bergner/gcc/build/gcc-fsf-mainline-bootstrap-lra-default-debug/gcc/xgcc -B/home/bergner/gcc/build/gcc-fsf-mainline-bootstrap-lra-default-debug/gcc/ -S -O1 -mvsx -S bug2.i
bug2.i: In function ‘foo’:
bug2.i:5:1: internal compiler error: Max. number of generated reload insns per insn is achieved (90)

 }
 ^
0x10962903 lra_constraints(bool)
	/home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/lra-constraints.c:4351
0x10942af7 lra(_IO_FILE*)
	/home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/lra.c:2298
0x108c0ac7 do_reload
	/home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/ira.c:5391
0x108c1183 execute
	/home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/ira.c:5562


After IRA, things are pretty simple, with just the following one insn which needs
a reload/spill, since we don't have memory to memory ops on POWER:

(insn 7 4 10 2 (parallel [
            (set (mem:TF (reg:DI 3 3 [ ldb1 ]) [0 *ldb1_5(D)+0 S16 A128])
                (float_extend:TF (mem:DF (reg:DI 4 4 [ db1 ]) [0 *db1_2(D)+0 S8 A64])))
            (use (const_double:DF 0.0 [0x0.0p+0]))
        ]) bug2.i:4 445 {*extenddftf2_internal}
     (expr_list:REG_DEAD (reg:DI 4 4 [ db1 ])
        (expr_list:REG_DEAD (reg:DI 3 3 [ ldb1 ])
            (nil))))

In LRA, comes along and gives us the following which looks good:

(insn 7 4 11 2 (parallel [
            (set (reg:TF 159)
                (float_extend:TF (mem:DF (reg:DI 4 4 [ db1 ]) [0 *db1_2(D)+0 S8 A64])))
            (use (const_double:DF 0.0 [0x0.0p+0]))
        ]) bug2.i:4 445 {*extenddftf2_internal}
     (expr_list:REG_DEAD (reg:DI 4 4 [ db1 ])
        (expr_list:REG_DEAD (reg:DI 3 3 [ ldb1 ])
            (nil))))

(insn 11 7 10 2 (set (mem:TF (reg:DI 3 3 [ ldb1 ]) [0 *ldb1_5(D)+0 S16 A128])
        (reg:TF 159)) bug2.i:4 435 {*movtf_64bit_dm}
     (nil))

but for some reason, it thinks reg 159 needs reloading and gives us:

(insn 7 4 12 2 (parallel [
            (set (reg:TF 159)
                (float_extend:TF (mem:DF (reg:DI 4 4 [ db1 ]) [0 *db1_2(D)+0 S8 A64])))
            (use (const_double:DF 0.0 [0x0.0p+0]))
        ]) bug2.i:4 445 {*extenddftf2_internal}
     (expr_list:REG_DEAD (reg:DI 4 4 [ db1 ])
        (expr_list:REG_DEAD (reg:DI 3 3 [ ldb1 ])
            (nil))))

(insn 12 7 11 2 (set (reg:TF 160 [159])
        (reg:TF 159)) bug2.i:4 435 {*movtf_64bit_dm}
     (nil))

(insn 11 12 10 2 (set (mem:TF (reg:DI 3 3 [ ldb1 ]) [0 *ldb1_5(D)+0 S16 A128])
        (reg:TF 160 [159])) bug2.i:4 435 {*movtf_64bit_dm}
     (nil))

and we end up doing it again and again and...until we hit the reload threshold
and ICE.  That's as far as I've gotten at this point.  Comments welcome since
I've had to put this on the shelf at the moment while working on next year's
work schedule for our team.

I haven't had a chance to look into the other ICE or wrong code gen issue yet,
but will eventually will get to those.

Peter