From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 68674 invoked by alias); 7 Oct 2015 00:00:01 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 68642 invoked by uid 89); 7 Oct 2015 00:00:00 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wi0-f174.google.com Received: from mail-wi0-f174.google.com (HELO mail-wi0-f174.google.com) (209.85.212.174) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 06 Oct 2015 23:59:57 +0000 Received: by wicfx3 with SMTP id fx3so5077628wic.0 for ; Tue, 06 Oct 2015 16:59:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=AfNZyVUUr1cPkvjv1WQ3M5hhBVXQE1cHkpc910ukh2Q=; b=kMtiaz+L/bDxyd85tw12b9HNW7qwXlNTcbxmOJMz3iqBvYQYlHc7344OV6zcu94yOc ILVhuwrMaJ6A+GIAu5EfgqY7NrTwIdJnrr4WvDbsYOpyvW/c8Cp7egRdwwe5UWZnvpks BrVUQ5IFIwWIEe3gCOzdpdhcraMVdpUhZl+r1qGk5xNULn9Ej8XLDlKx1n60VXjLsftd V25K7wkLPzSkoeLtvkdrrqn+yeGcKcLP4WZpEEKcxYYl+6d4vuuU/22vG4eL/LjgFiB9 pbDfELOSLuR6G3BPaQq8R/Sf8mBF6h15Yc9awODrABxmdsSq6td3m649GLyKRK1vOKl3 l4uQ== X-Gm-Message-State: ALoCoQmUuYOvtPaPIZE+w7gsfrSHHH8AJLOl9y0BzFwRvDqL2Z3mCtYoYMzdlCpFzF6G74oP9v56 X-Received: by 10.180.87.225 with SMTP id bb1mr21198113wib.0.1444175994267; Tue, 06 Oct 2015 16:59:54 -0700 (PDT) Received: from localhost.localdomain (cpc10-cmbg17-2-0-cust610.5-4.cable.virginm.net. [86.30.42.99]) by smtp.gmail.com with ESMTPSA id bf8sm35470532wjc.22.2015.10.06.16.59.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Oct 2015 16:59:53 -0700 (PDT) From: charles.baylis@linaro.org To: kyrylo.tkachov@arm.com, Ramana.Radhakrishnan@arm.com, alan.lawrence@arm.com Cc: gcc-patches@gcc.gnu.org Subject: [PATCH v2 0/3] [ARM] PR63870 vldN_lane/vstN_lane error messages Date: Wed, 07 Oct 2015 00:00:00 -0000 Message-Id: <1444175989-24944-1-git-send-email-charles.baylis@linaro.org> X-IsSubscribed: yes X-SW-Source: 2015-10/txt/msg00657.txt.bz2 From: Charles Baylis This patch series fixes up the error messages for single lane vector load/stores, similarly to AArch64. make check on arm-linux-gnueabihf/qemu completes with no new regressions. Changes since the last version: . removed the duplicate arm_neon_lane_bounds function . resolved conflicts with other NEON work . whitespace clean up Charles Baylis (3): [ARM] PR63870 Add qualifiers for NEON builtins [ARM] PR63870 Mark lane indices of vldN/vstN with appropriate qualifier [ARM] PR63870 Enable test cases for ARM gcc/config/arm/arm-builtins.c | 50 ++++++++++++++-------- gcc/config/arm/arm.c | 1 + gcc/config/arm/arm.h | 3 ++ gcc/config/arm/neon.md | 49 +++++++++++---------- .../advsimd-intrinsics/vld2_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld2q_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld3q_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vld4q_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst2q_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst3q_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4_lane_u8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_f16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_f32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_f64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_p8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_s16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_s32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_s64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_s8_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_u16_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_u32_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_u64_indices_1.c | 5 +-- .../advsimd-intrinsics/vst4q_lane_u8_indices_1.c | 5 +-- 148 files changed, 350 insertions(+), 473 deletions(-) -- 1.9.1