From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7531 invoked by alias); 18 Mar 2016 17:49:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 7475 invoked by uid 89); 18 Mar 2016 17:49:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.2 required=5.0 tests=AWL,BAYES_05,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=UD:y, conform, Hx-languages-length:1690, HX-HELO:eggs.gnu.org X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Fri, 18 Mar 2016 17:48:57 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1agyW5-0006bW-9L for gcc-patches@gcc.gnu.org; Fri, 18 Mar 2016 13:48:54 -0400 Received: from smtp.ispras.ru ([83.149.199.79]:58810) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agyW5-0006bK-1R for gcc-patches@gcc.gnu.org; Fri, 18 Mar 2016 13:48:53 -0400 Received: from condor.intra.ispras.ru (unknown [83.149.199.91]) by smtp.ispras.ru (Postfix) with ESMTP id E7F3B2277B for ; Fri, 18 Mar 2016 20:48:47 +0300 (MSK) Received: by condor.intra.ispras.ru (Postfix, from userid 23246) id 90BC01220776; Fri, 18 Mar 2016 20:48:47 +0300 (MSK) From: Alexander Monakov To: gcc-patches@gcc.gnu.org Subject: [gomp-nvptx 6/7] nvptx backend: change mul.u32 to mul.lo.u32 Date: Fri, 18 Mar 2016 18:13:00 -0000 Message-Id: <1458323327-9908-7-git-send-email-amonakov@ispras.ru> In-Reply-To: <1458323327-9908-1-git-send-email-amonakov@ispras.ru> References: <1458323327-9908-1-git-send-email-amonakov@ispras.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 83.149.199.79 X-IsSubscribed: yes X-SW-Source: 2016-03/txt/msg01112.txt.bz2 Recent testing uncovered that PTX JIT may reject attempts to use 'mul.u32' as a non-widening 32-bit multiply instruction. Use 'mul.lo.u32' to fix 32-bit code generation and conform to the PTX spec better. * config/nvptx/nvptx.c (nvptx_init_unisimt_predicate): Emit 'mul.lo.u32' instead of 'mul.u32' for 32-bit ABI target. (nvptx_declare_function_name): Ditto. --- gcc/ChangeLog.gomp-nvptx | 6 ++++++ gcc/config/nvptx/nvptx.c | 4 ++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c index 93bf781..bc187ea 100644 --- a/gcc/config/nvptx/nvptx.c +++ b/gcc/config/nvptx/nvptx.c @@ -955,7 +955,7 @@ nvptx_init_unisimt_predicate (FILE *file) fprintf (file, "\t\t.reg.u%d %%ustmp2;\n", bits); fprintf (file, "\t\tmov.u32 %%ustmp0, %%tid.y;\n"); fprintf (file, "\t\tmul%s.u32 %%ustmp1, %%ustmp0, 4;\n", - bits == 64 ? ".wide" : ""); + bits == 64 ? ".wide" : ".lo"); fprintf (file, "\t\tmov.u%d %%ustmp2, __nvptx_uni;\n", bits); fprintf (file, "\t\tadd.u%d %%ustmp2, %%ustmp2, %%ustmp1;\n", bits); fprintf (file, "\t\tld.shared.u32 %%r%d, [%%ustmp2];\n", master); @@ -1115,7 +1115,7 @@ nvptx_declare_function_name (FILE *file, const char *name, const_tree decl) fprintf (file, "\t.reg.u%d %%fstmp2;\n", bits); fprintf (file, "\tmov.u32 %%fstmp0, %%tid.y;\n"); fprintf (file, "\tmul%s.u32 %%fstmp1, %%fstmp0, %d;\n", - bits == 64 ? ".wide" : "", bits / 8); + bits == 64 ? ".wide" : ".lo", bits / 8); fprintf (file, "\tmov.u%d %%fstmp2, __nvptx_stacks;\n", bits); /* fstmp2 = &__nvptx_stacks[tid.y]; */ fprintf (file, "\tadd.u%d %%fstmp2, %%fstmp2, %%fstmp1;\n", bits);