From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 61793 invoked by alias); 4 Jun 2016 06:11:10 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 61756 invoked by uid 89); 4 Jun 2016 06:11:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=mems, Hx-languages-length:1255 X-HELO: mailout04.t-online.de Received: from mailout04.t-online.de (HELO mailout04.t-online.de) (194.25.134.18) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Sat, 04 Jun 2016 06:11:07 +0000 Received: from fwd11.aul.t-online.de (fwd11.aul.t-online.de [172.20.27.152]) by mailout04.t-online.de (Postfix) with SMTP id D8E7D41B1A27 for ; Sat, 4 Jun 2016 08:11:02 +0200 (CEST) Received: from [192.168.0.16] (Vr4L+BZG8hCBe1ByPGrs5OZmWcxmssK5XZjSELDjAUx4ZqBav1v2Nf0ntW4NNBpQHU@[115.165.93.200]) by fwd11.t-online.de with (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384 encrypted) esmtp id 1b94nU-0hfTXc0; Sat, 4 Jun 2016 08:11:00 +0200 Message-ID: <1465020657.15496.108.camel@t-online.de> Subject: [SH][committed] Avoid potential slient wrong-code with reg+reg addr. modes From: Oleg Endo To: gcc-patches Date: Sat, 04 Jun 2016 06:11:00 -0000 Content-Type: multipart/mixed; boundary="=-YiS8geTcuMh0ZeVJx/C3" Mime-Version: 1.0 X-IsSubscribed: yes X-SW-Source: 2016-06/txt/msg00318.txt.bz2 --=-YiS8geTcuMh0ZeVJx/C3 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Content-length: 390 Hi, The attached patch removes the hardcoded "r0" when printing reg+reg addressing mode mems on SH. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r237088. Cheers, Oleg gcc/ChangeLog: * config/sh/sh.c (sh_print_operand_address): Don't use hardcoded 'r0' for reg+reg addressing mode. --=-YiS8geTcuMh0ZeVJx/C3 Content-Disposition: attachment; filename="sh_reg_reg_addr_mode_printing.patch" Content-Transfer-Encoding: base64 Content-Type: text/x-patch; name="sh_reg_reg_addr_mode_printing.patch"; charset="UTF-8" Content-length: 1184 ZGlmZiAtLWdpdCBhL2djYy9jb25maWcvc2gvc2guYyBiL2djYy9jb25maWcv c2gvc2guYwppbmRleCAyYmQ5MTdhLi43NDMyN2FhIDEwMDY0NAotLS0gYS9n Y2MvY29uZmlnL3NoL3NoLmMKKysrIGIvZ2NjL2NvbmZpZy9zaC9zaC5jCkBA IC0xMDM4LDggKzEwMzgsMTYgQEAgc2hfcHJpbnRfb3BlcmFuZF9hZGRyZXNz IChGSUxFICpzdHJlYW0sIG1hY2hpbmVfbW9kZSAvKm1vZGUqLywgcnR4IHgp CiAJICAgICAgaW50IGJhc2VfbnVtID0gdHJ1ZV9yZWdudW0gKGJhc2UpOwog CSAgICAgIGludCBpbmRleF9udW0gPSB0cnVlX3JlZ251bSAoaW5kZXgpOwog Ci0JICAgICAgZnByaW50ZiAoc3RyZWFtLCAiQChyMCwlcykiLAotCQkgICAg ICAgcmVnX25hbWVzW01BWCAoYmFzZV9udW0sIGluZGV4X251bSldKTsKKwkg ICAgICAvKiBJZiBiYXNlIG9yIGluZGV4IGlzIFIwLCBtYWtlIHN1cmUgdGhh dCBpdCBjb21lcyBmaXJzdC4KKwkJIFVzdWFsbHkgb25lIG9mIHRoZW0gd2ls bCBiZSBSMCwgYnV0IHRoZSBvcmRlciBtaWdodCBiZSB3cm9uZy4KKwkJIElm IG5laXRoZXIgYmFzZSBub3IgaW5kZXggYXJlIFIwIGl0J3MgYW4gZXJyb3Ig YW5kIHdlIGp1c3QKKwkJIHBhc3MgaXQgb24gdG8gdGhlIGFzc2VtYmxlci4g IFRoaXMgYXZvaWRzIHNpbGVudCB3cm9uZyBjb2RlCisJCSBidWdzLiAgKi8K KwkgICAgICBpZiAoYmFzZV9udW0gPT0gMCAmJiBpbmRleF9udW0gIT0gMCkK KwkJc3RkOjpzd2FwIChiYXNlX251bSwgaW5kZXhfbnVtKTsKKworCSAgICAg IGZwcmludGYgKHN0cmVhbSwgIkAoJXMsJXMpIiwgcmVnX25hbWVzW2luZGV4 X251bV0sCisJCQkJCSAgIHJlZ19uYW1lc1tiYXNlX251bV0pOwogCSAgICAg IGJyZWFrOwogCSAgICB9CiAK --=-YiS8geTcuMh0ZeVJx/C3--