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Violators will be prosecuted; Thu, 7 Jul 2016 13:11:03 -0600 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: wschmidt@linux.vnet.ibm.com Received: from b03cxnp07028.gho.boulder.ibm.com (b03cxnp07028.gho.boulder.ibm.com [9.17.130.15]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id E0DDA3E40047; Thu, 7 Jul 2016 13:11:02 -0600 (MDT) Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u67JB20c49938572; Thu, 7 Jul 2016 12:11:02 -0700 Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A75726E03F; Thu, 7 Jul 2016 13:11:02 -0600 (MDT) Received: from [9.10.86.199] (unknown [9.10.86.199]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP id 5CFFC6E044; Thu, 7 Jul 2016 13:11:02 -0600 (MDT) Subject: [PATCH, rs6000] Fix PR71297 (ICE on invalid calls to vec_ld and vec_st) From: Bill Schmidt To: gcc-patches@gcc.gnu.org Cc: segher@crashing.kernel.org, dje.gcc@gmail.com Content-Type: text/plain; charset="UTF-8" Date: Thu, 07 Jul 2016 19:11:00 -0000 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16070719-0024-0000-0000-0000140F1C0A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16070719-0025-0000-0000-0000427D0ECF Message-Id: <1467918661.18357.5.camel@oc8801110288.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-07-07_09:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1607070172 X-IsSubscribed: yes X-SW-Source: 2016-07/txt/msg00347.txt.bz2 Hi, PR71297 reports that we ICE when __builtin_vec_ld or __builtin_vec_st is provided with an incorrect number of arguments. This patch fixes it by bypassing special handling for these intrinsics when the number of arguments is wrong, thus allowing the standard error handling for builtins to kick in. The patch is pretty obvious and I think adding a test case would be extraneous, though I can do so if desired. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions, and the original failure is fixed. Is this ok for trunk? Thanks, Bill 2016-07-07 Bill Schmidt PR target/71297 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Allow standard error handling to take over when a wrong number of arguments is presented to __builtin_vec_ld () or __builtin_vec_st (). Index: gcc/config/rs6000/rs6000-c.c =================================================================== --- gcc/config/rs6000/rs6000-c.c (revision 238120) +++ gcc/config/rs6000/rs6000-c.c (working copy) @@ -5281,10 +5281,11 @@ assignment for unaligned loads and stores"); are able to honor __restrict__, for example. We may want to consider this for all memory access built-ins. - When -maltivec=be is specified, simply punt to existing - built-in processing. */ + When -maltivec=be is specified, or the wrong number of arguments + is provided, simply punt to existing built-in processing. */ if (fcode == ALTIVEC_BUILTIN_VEC_LD - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)) + && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG) + && nargs == 2) { tree arg0 = (*arglist)[0]; tree arg1 = (*arglist)[1]; @@ -5354,7 +5355,8 @@ assignment for unaligned loads and stores"); /* Similarly for stvx. */ if (fcode == ALTIVEC_BUILTIN_VEC_ST - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)) + && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG) + && nargs == 3) { tree arg0 = (*arglist)[0]; tree arg1 = (*arglist)[1];