From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 121260 invoked by alias); 17 Jul 2018 01:34:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 121247 invoked by uid 89); 17 Jul 2018 01:34:05 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-7.8 required=5.0 tests=AWL,BAYES_00,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=H*r:sk:v15-v6s, H*Ad:U*rth X-HELO: mail-pf0-f174.google.com Received: from mail-pf0-f174.google.com (HELO mail-pf0-f174.google.com) (209.85.192.174) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 17 Jul 2018 01:34:03 +0000 Received: by mail-pf0-f174.google.com with SMTP id v15-v6so7167835pff.5 for ; Mon, 16 Jul 2018 18:34:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:subject:to:cc:references:from:openpgp:autocrypt:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=MlkhCUfIXYFzONJjnNcoIt45Kx24lqkfPkDo+rtU/GI=; b=Px7CYDGuq7QqEhiN98I4D78Qi05ghEjYsyRsQNZ5iHCbVTBswqOu2WVHnhpIP6erk1 MdD32Lag4xiTOZtTCS9L95s2rI2vMVUzC3b75MIde/MqvkFRsrx8q+NAEeBG7EE3bCbB TSWkiNs1TXEB0a6cR700i9PUcFqftGcL+GlZZs9N3nOa/hqDtNNpEbJwUmn2JOs3Uwkr fggQLZ/n2awgMht+kPHYGk5TgrylQwQRTdXDaS5RPCM3Z4ddMuaREYPAEg1cQ0fpLaQU ecDH41JtKnmbS98XEQbK8w+2bHOGaAZ+vm0Lgw7oM9X5XkSX1uA1TS69Rqt3Vhq6tXJZ +u8w== Return-Path: Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. [97.126.112.211]) by smtp.googlemail.com with ESMTPSA id m9-v6sm50597722pge.25.2018.07.16.18.34.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Jul 2018 18:34:01 -0700 (PDT) Sender: Richard Henderson Subject: Re: [GCC][PATCH][Aarch64] Exploiting BFXIL when OR-ing two AND-operations with appropriate bitmasks To: Sam Tebbs , Sudakshina Das , "gcc-patches@gcc.gnu.org" Cc: nd , richard.earnshaw@arm.com, marcus.shawcroft@arm.com, james.greenhalgh@arm.com References: <14ec9e29-9ec0-cd70-8a2c-c00723e96427@arm.com> <3e07b208-6de4-1af2-2e6f-72f330239bbd@arm.com> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: <1487cf4e-b5d4-3ff2-ddd2-90482a607666@twiddle.net> Date: Tue, 17 Jul 2018 01:34:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <3e07b208-6de4-1af2-2e6f-72f330239bbd@arm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2018-07/txt/msg00875.txt.bz2 On 07/16/2018 10:10 AM, Sam Tebbs wrote: > +++ b/gcc/config/aarch64/aarch64.c > @@ -1439,6 +1439,14 @@ aarch64_hard_regno_caller_save_mode (unsigned regno, unsigned, > return SImode; > } > > +/* Implement IS_LEFT_CONSECUTIVE. Check if an integer's bits are consecutive > + ones from the MSB. */ > +bool > +aarch64_is_left_consecutive (HOST_WIDE_INT i) > +{ > + return (i | (i - 1)) == HOST_WIDE_INT_M1; > +} > + ... > +(define_insn "*aarch64_bfxil" > + [(set (match_operand:DI 0 "register_operand" "=r") > + (ior:DI (and:DI (match_operand:DI 1 "register_operand" "r") > + (match_operand 3 "const_int_operand")) > + (and:DI (match_operand:DI 2 "register_operand" "0") > + (match_operand 4 "const_int_operand"))))] > + "INTVAL (operands[3]) == ~INTVAL (operands[4]) > + && aarch64_is_left_consecutive (INTVAL (operands[4]))" Better is to use a define_predicate to merge both that second test and the const_int_operand. (I'm not sure about the "left_consecutive" language either. Isn't it more descriptive to say that op3 is a power of 2 minus 1?) (define_predicate "pow2m1_operand" (and (match_code "const_int") (match_test "exact_pow2 (INTVAL(op) + 1) > 0"))) and use (match_operand:DI 3 "pow2m1_operand") and then just the INTVAL (operands[3]) == ~INTVAL (operands[4]) test. Also, don't omit the modes for the constants. Also, there's no reason this applies only to DI mode; use the GPI iterator and % in the output template. > + HOST_WIDE_INT op3 = INTVAL (operands[3]); > + operands[3] = GEN_INT (ceil_log2 (op3)); > + output_asm_insn ("bfxil\\t%0, %1, 0, %3", operands); > + return ""; You can just return the string that you passed to output_asm_insn. > + } > + [(set_attr "type" "bfx")] The other aliases of the BFM insn use type "bfm"; "bfx" appears to be aliases of UBFM and SBFM. Not that it appears to matter to the scheduling descriptions, but it is inconsistent. r~