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From: Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
To: <gcc-patches@gcc.gnu.org>
Cc: <Claudiu.Zissulescu@synopsys.com>,	<Francois.Bedard@synopsys.com>,
	<andrew.burgess@embecosm.com>
Subject: [PATCH 3/7] [ARC] Allow r30 to be used by the reg-alloc.
Date: Fri, 19 May 2017 10:35:00 -0000	[thread overview]
Message-ID: <1495189862-20533-4-git-send-email-claziss@synopsys.com> (raw)
In-Reply-To: <1495189862-20533-1-git-send-email-claziss@synopsys.com>

gcc/
2016-12-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_conditional_register_usage): Allow r30 to
	be used by the reg-alloc.
---
 gcc/config/arc/arc.c | 9 ++++++++-
 gcc/config/arc/arc.h | 3 ++-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index fd4bf2c..ff86f6c 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -1551,7 +1551,14 @@ arc_conditional_register_usage (void)
       /* For ARCv2 the core register set is changed.  */
       strcpy (rname29, "ilink");
       strcpy (rname30, "r30");
-      fixed_regs[30] = call_used_regs[30] = 1;
+      call_used_regs[30] = 1;
+      fixed_regs[30] = 0;
+
+      arc_regno_reg_class[30] = WRITABLE_CORE_REGS;
+      SET_HARD_REG_BIT (reg_class_contents[WRITABLE_CORE_REGS], 30);
+      SET_HARD_REG_BIT (reg_class_contents[CHEAP_CORE_REGS], 30);
+      SET_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], 30);
+      SET_HARD_REG_BIT (reg_class_contents[MPY_WRITABLE_CORE_REGS], 30);
    }
 
   if (TARGET_MUL64_SET)
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 0a4c745..fbc1195 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -641,7 +641,8 @@ extern enum reg_class arc_regno_reg_class[];
   ((REGNO) < 29 || ((REGNO) == ARG_POINTER_REGNUM) || ((REGNO) == 63)	\
    || ((unsigned) reg_renumber[REGNO] < 29)				\
    || ((unsigned) (REGNO) == (unsigned) arc_tp_regno)			\
-   || (fixed_regs[REGNO] == 0 && IN_RANGE (REGNO, 32, 59)))
+   || (fixed_regs[REGNO] == 0 && IN_RANGE (REGNO, 32, 59))		\
+   || ((REGNO) == 30 && fixed_regs[REGNO] == 0))
 
 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
 
-- 
1.9.1

  parent reply	other threads:[~2017-05-19 10:33 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-19 10:34 [PATCH 0/7] [ARC] Patterns update and fixes Claudiu Zissulescu
2017-05-19 10:34 ` [PATCH 5/7] [ARC] Update (non)commutative_binary_comparison patterns Claudiu Zissulescu
2017-05-31 15:40   ` Andrew Burgess
2017-06-01  9:46     ` Claudiu Zissulescu
2017-05-19 10:34 ` [PATCH 6/7] [ARC] Prevent moving stores to the frame before the stack adjustment Claudiu Zissulescu
2017-05-31 16:40   ` Andrew Burgess
2017-06-01  8:30     ` Claudiu Zissulescu
2017-06-01  9:45     ` Claudiu Zissulescu
2017-05-19 10:34 ` [PATCH 7/7] [ARC] Test against frame_pointer_needed in arc_can_eliminate Claudiu Zissulescu
2017-05-31 16:28   ` Andrew Burgess
2017-06-01  9:46     ` Claudiu Zissulescu
2017-05-19 10:34 ` [PATCH 2/7] [ARC] Avoid use of hard registers before reg-alloc Claudiu Zissulescu
2017-05-31 14:52   ` Andrew Burgess
2017-06-01  9:48     ` Claudiu Zissulescu
2017-05-19 10:34 ` [PATCH 1/7] [ARC] Make mulsi for A700 pattern commutative Claudiu Zissulescu
2017-05-20  7:49   ` Andrew Burgess
2017-06-01  9:49     ` Claudiu Zissulescu
2017-05-19 10:34 ` [PATCH 4/7] [ARC] Change predicate movv2hi to avoid scaled addresses Claudiu Zissulescu
2017-05-31 15:36   ` Andrew Burgess
2017-06-01  9:47     ` Claudiu Zissulescu
2017-05-19 10:35 ` Claudiu Zissulescu [this message]
2017-05-31 15:10   ` [PATCH 3/7] [ARC] Allow r30 to be used by the reg-alloc Andrew Burgess
2017-06-01  9:47     ` Claudiu Zissulescu

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