From: Steven Munroe <munroesj@linux.vnet.ibm.com>
To: gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
David Edelsohn <dje.gcc@gmail.com>
Subject: [PATCH rs6000] Addition fixes to BMI intrinsic test
Date: Thu, 25 May 2017 02:17:00 -0000 [thread overview]
Message-ID: <1495676565.15444.31.camel@oc7878010663> (raw)
Bill Seurer pointed out that building the BMI tests on a power8 but with
gcc built --with-cpu=power6 fails with link errors. The intrinsics
_pdep_u64/32 and _pext_u64/32 are guarded with #ifdef _ARCH_PWR7 as the
implementation uses bpermd and popcntd instructions introduced with
power7 (PowerISA-2.06).
But if the GCC is built --with-cpu=power6, the compiler is capable of
supporting -mcpu=power7 but will not generate bpermd/popcntd by default.
Then if some code them uses say _pext_u64 with -mcpu=power6 the
intrinsic is not not supported (needs power7) and so not defined.
The dg tests are guarded with dg-require-effective-target
powerpc_vsx_ok, This only tests if GCC and Binutils are capable of
generating vsx (and by extension PowerISA-2.06 bpermd and popcntd)
instructions.
In this case the result is the intrinsic functions are implicitly
defined as extern and cause a link failure. The solution is to guard the
test code with #ifdef _ARCH_PWR7 so that it does not attempt to use
instructions that are not there.
However for dg-compile test bmi2-pext64-1a.c we have no alternative to
add -mcpu=power7 to dg-options.
[gcc/testsuite]
2017-05-24 Steven Munroe <munroesj@gcc.gnu.org>
* gcc.target/powerpc/bmi2-pdep32-1.c [_ARCH_PWR7]: Prevent
implicit function for processors without bpermd instruction.
* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext64-1a.c: Add -mcpu=power7
to dg-option.
Index: gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c (revision 248381)
+++ gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c (working copy)
@@ -7,6 +7,7 @@
#include <x86intrin.h>
#include "bmi2-check.h"
+#ifdef _ARCH_PWR7
__attribute__((noinline))
unsigned long long
calc_pdep_u64 (unsigned long long a, unsigned long long mask)
@@ -21,11 +22,13 @@ calc_pdep_u64 (unsigned long long a, unsigned long
}
return res;
}
+#endif /* _ARCH_PWR7 */
static
void
bmi2_test ()
{
+#ifdef _ARCH_PWR7
unsigned long long i;
unsigned long long src = 0xce7acce7acce7ac;
unsigned long long res, res_ref;
@@ -39,4 +42,5 @@ bmi2_test ()
if (res != res_ref)
abort ();
}
+#endif /* _ARCH_PWR7 */
}
Index: gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c (revision 248381)
+++ gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c (working copy)
@@ -7,6 +7,7 @@
#include <x86intrin.h>
#include "bmi2-check.h"
+#ifdef _ARCH_PWR7
__attribute__((noinline))
unsigned long long
calc_pext_u64 (unsigned long long a, unsigned long long mask)
@@ -22,10 +23,12 @@ calc_pext_u64 (unsigned long long a, unsigned long
return res;
}
+#endif /* _ARCH_PWR7 */
static void
bmi2_test ()
{
+#ifdef _ARCH_PWR7
unsigned long long i;
unsigned long long src = 0xce7acce7acce7ac;
unsigned long long res, res_ref;
@@ -39,4 +42,5 @@ bmi2_test ()
if (res != res_ref)
abort();
}
+#endif /* _ARCH_PWR7 */
}
Index: gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c (revision 248381)
+++ gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c (working copy)
@@ -7,6 +7,7 @@
#include <x86intrin.h>
#include "bmi2-check.h"
+#ifdef _ARCH_PWR7
__attribute__((noinline))
unsigned
calc_pdep_u32 (unsigned a, int mask)
@@ -22,10 +23,12 @@ calc_pdep_u32 (unsigned a, int mask)
return res;
}
+#endif /* _ARCH_PWR7 */
static void
bmi2_test ()
{
+#ifdef _ARCH_PWR7
unsigned i;
unsigned src = 0xce7acc;
unsigned res, res_ref;
@@ -39,4 +42,5 @@ bmi2_test ()
if (res != res_ref)
abort();
}
+#endif /* _ARCH_PWR7 */
}
Index: gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c (revision 248381)
+++ gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c (working copy)
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O3" } */
+/* { dg-options "-O3 -mcpu=power7" } */
/* { dg-require-effective-target lp64 } */
/* { dg-require-effective-target powerpc_vsx_ok } */
Index: gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c (revision 248381)
+++ gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c (working copy)
@@ -7,6 +7,7 @@
#include <x86intrin.h>
#include "bmi2-check.h"
+#ifdef _ARCH_PWR7
__attribute__((noinline))
unsigned
calc_pext_u32 (unsigned a, unsigned mask)
@@ -22,10 +23,12 @@ calc_pext_u32 (unsigned a, unsigned mask)
return res;
}
+#endif /* _ARCH_PWR7 */
static void
bmi2_test ()
{
+#ifdef _ARCH_PWR7
unsigned i;
unsigned src = 0xce7acc;
unsigned res, res_ref;
@@ -39,4 +42,5 @@ bmi2_test ()
if (res != res_ref)
abort();
}
+#endif /* _ARCH_PWR7 */
}
reply other threads:[~2017-05-25 1:42 UTC|newest]
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