From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 99087 invoked by alias); 1 Jun 2017 13:38:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 98992 invoked by uid 89); 1 Jun 2017 13:38:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: smtprelay.synopsys.com Received: from us01smtprelay-2.synopsys.com (HELO smtprelay.synopsys.com) (198.182.47.9) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 01 Jun 2017 13:38:04 +0000 Received: from mailhost.synopsys.com (mailhost2.synopsys.com [10.13.184.66]) by smtprelay.synopsys.com (Postfix) with ESMTP id 804B924E1F2A; Thu, 1 Jun 2017 06:38:07 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 678FFB99; Thu, 1 Jun 2017 06:38:07 -0700 (PDT) Received: from us01wehtc1.internal.synopsys.com (us01wehtc1.internal.synopsys.com [10.12.239.235]) by mailhost.synopsys.com (Postfix) with ESMTP id 3DE41B94; Thu, 1 Jun 2017 06:38:07 -0700 (PDT) Received: from IN01WEHTCB.internal.synopsys.com (10.144.199.106) by us01wehtc1.internal.synopsys.com (10.12.239.231) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 1 Jun 2017 06:38:02 -0700 Received: from IN01WEHTCA.internal.synopsys.com (10.144.199.104) by IN01WEHTCB.internal.synopsys.com (10.144.199.105) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 1 Jun 2017 19:07:59 +0530 Received: from nl20droid1.internal.synopsys.com (10.100.24.228) by IN01WEHTCA.internal.synopsys.com (10.144.199.243) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 1 Jun 2017 19:07:58 +0530 From: Claudiu Zissulescu To: CC: , , Subject: [PATCH 5/7] [ARC] Enable indexed loads for elf targers. Date: Thu, 01 Jun 2017 13:38:00 -0000 Message-ID: <1496324097-21221-6-git-send-email-claziss@synopsys.com> In-Reply-To: <1496324097-21221-1-git-send-email-claziss@synopsys.com> References: <1496324097-21221-1-git-send-email-claziss@synopsys.com> MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-06/txt/msg00037.txt.bz2 gcc/ 2017-02-28 Claudiu Zissulescu * config/arc/arc.opt (mindexed-loads): Use initial value TARGET_INDEXED_LOADS_DEFAULT. (mauto-modify-reg): Use initial value TARGET_AUTO_MODIFY_REG_DEFAULT. * config/arc/elf.h (TARGET_INDEXED_LOADS_DEFAULT): Define. (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. * config/arc/linux.h (TARGET_INDEXED_LOADS_DEFAULT): Define. (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. --- gcc/config/arc/arc.opt | 4 ++-- gcc/config/arc/elf.h | 8 ++++++++ gcc/config/arc/linux.h | 8 ++++++++ 3 files changed, 18 insertions(+), 2 deletions(-) diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index f01a2ff..ed2b827 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -270,11 +270,11 @@ Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_XMAC) Tune for ARC700 R4.2 Cpu with XMAC block. mindexed-loads -Target Var(TARGET_INDEXED_LOADS) +Target Var(TARGET_INDEXED_LOADS) Init(TARGET_INDEXED_LOADS_DEFAULT) Enable the use of indexed loads. mauto-modify-reg -Target Var(TARGET_AUTO_MODIFY_REG) +Target Var(TARGET_AUTO_MODIFY_REG) Init(TARGET_AUTO_MODIFY_REG_DEFAULT) Enable the use of pre/post modify with register displacement. mmul32x16 diff --git a/gcc/config/arc/elf.h b/gcc/config/arc/elf.h index c5794f8..43f3408 100644 --- a/gcc/config/arc/elf.h +++ b/gcc/config/arc/elf.h @@ -58,3 +58,11 @@ along with GCC; see the file COPYING3. If not see /* Bare-metal toolchains do not need a thread pointer register. */ #undef TARGET_ARC_TP_REGNO_DEFAULT #define TARGET_ARC_TP_REGNO_DEFAULT -1 + +/* Indexed loads are default. */ +#undef TARGET_INDEXED_LOADS_DEFAULT +#define TARGET_INDEXED_LOADS_DEFAULT 1 + +/* Pre/post modify with register displacement are default. */ +#undef TARGET_AUTO_MODIFY_REG_DEFAULT +#define TARGET_AUTO_MODIFY_REG_DEFAULT 1 diff --git a/gcc/config/arc/linux.h b/gcc/config/arc/linux.h index 83e5a1d..d8e0063 100644 --- a/gcc/config/arc/linux.h +++ b/gcc/config/arc/linux.h @@ -83,3 +83,11 @@ along with GCC; see the file COPYING3. If not see #define SUBTARGET_CPP_SPEC "\ %{pthread:-D_REENTRANT} \ " + +/* Indexed loads are default off. */ +#undef TARGET_INDEXED_LOADS_DEFAULT +#define TARGET_INDEXED_LOADS_DEFAULT 0 + +/* Pre/post modify with register displacement are default off. */ +#undef TARGET_AUTO_MODIFY_REG_DEFAULT +#define TARGET_AUTO_MODIFY_REG_DEFAULT 0 -- 1.9.1