From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 98714 invoked by alias); 1 Jun 2017 13:38:08 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 98549 invoked by uid 89); 1 Jun 2017 13:38:07 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.7 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: smtprelay.synopsys.com Received: from us01smtprelay-2.synopsys.com (HELO smtprelay.synopsys.com) (198.182.60.111) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 01 Jun 2017 13:38:04 +0000 Received: from mailhost.synopsys.com (mailhost2.synopsys.com [10.13.184.66]) by smtprelay.synopsys.com (Postfix) with ESMTP id 9AC0110C1645; Thu, 1 Jun 2017 06:38:07 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 81875B9B; Thu, 1 Jun 2017 06:38:07 -0700 (PDT) Received: from us01wehtc1.internal.synopsys.com (us01wehtc1.internal.synopsys.com [10.12.239.235]) by mailhost.synopsys.com (Postfix) with ESMTP id 47480B96; Thu, 1 Jun 2017 06:38:07 -0700 (PDT) Received: from IN01WEHTCB.internal.synopsys.com (10.144.199.106) by us01wehtc1.internal.synopsys.com (10.12.239.231) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 1 Jun 2017 06:38:02 -0700 Received: from IN01WEHTCA.internal.synopsys.com (10.144.199.104) by IN01WEHTCB.internal.synopsys.com (10.144.199.105) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 1 Jun 2017 19:08:01 +0530 Received: from nl20droid1.internal.synopsys.com (10.100.24.228) by IN01WEHTCA.internal.synopsys.com (10.144.199.243) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 1 Jun 2017 19:08:00 +0530 From: Claudiu Zissulescu To: CC: , , Subject: [PATCH 6/7] [ARC] Deprecate mexpand-adddi option. Date: Thu, 01 Jun 2017 13:38:00 -0000 Message-ID: <1496324097-21221-7-git-send-email-claziss@synopsys.com> In-Reply-To: <1496324097-21221-1-git-send-email-claziss@synopsys.com> References: <1496324097-21221-1-git-send-email-claziss@synopsys.com> MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-06/txt/msg00036.txt.bz2 From: claziss Emitting subregs in the expand is not a good idea. Deprecate this option. gcc/ 2017-04-26 Claudiu Zissulescu * config/arc/arc.md (adddi3): Remove support for mexpand-adddi option. (subdi3): Likewise. * config/arc/arc.opt (mexpand-adddi): Deprecate it. * doc/invoke.texi (mexpand-adddi): Update text. --- gcc/config/arc/arc.md | 39 +-------------------------------------- gcc/config/arc/arc.opt | 2 +- gcc/doc/invoke.texi | 2 +- 3 files changed, 3 insertions(+), 40 deletions(-) diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 928feb1..f595da7 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -2649,30 +2649,7 @@ (match_operand:DI 2 "nonmemory_operand" ""))) (clobber (reg:CC CC_REG))])] "" -{ - if (TARGET_EXPAND_ADDDI) - { - rtx l0 = gen_lowpart (SImode, operands[0]); - rtx h0 = disi_highpart (operands[0]); - rtx l1 = gen_lowpart (SImode, operands[1]); - rtx h1 = disi_highpart (operands[1]); - rtx l2 = gen_lowpart (SImode, operands[2]); - rtx h2 = disi_highpart (operands[2]); - rtx cc_c = gen_rtx_REG (CC_Cmode, CC_REG); - - if (CONST_INT_P (h2) && INTVAL (h2) < 0 && SIGNED_INT12 (INTVAL (h2))) - { - emit_insn (gen_sub_f (l0, l1, gen_int_mode (-INTVAL (l2), SImode))); - emit_insn (gen_sbc (h0, h1, - gen_int_mode (-INTVAL (h2) - (l1 != 0), SImode), - cc_c)); - DONE; - } - emit_insn (gen_add_f (l0, l1, l2)); - emit_insn (gen_adc (h0, h1, h2)); - DONE; - } -}) +{}) ; This assumes that there can be no strictly partial overlap between ; operands[1] and operands[2]. @@ -2911,20 +2888,6 @@ { if (!register_operand (operands[2], DImode)) operands[1] = force_reg (DImode, operands[1]); - if (TARGET_EXPAND_ADDDI) - { - rtx l0 = gen_lowpart (SImode, operands[0]); - rtx h0 = disi_highpart (operands[0]); - rtx l1 = gen_lowpart (SImode, operands[1]); - rtx h1 = disi_highpart (operands[1]); - rtx l2 = gen_lowpart (SImode, operands[2]); - rtx h2 = disi_highpart (operands[2]); - rtx cc_c = gen_rtx_REG (CC_Cmode, CC_REG); - - emit_insn (gen_sub_f (l0, l1, l2)); - emit_insn (gen_sbc (h0, h1, h2, cc_c)); - DONE; - } }) (define_insn_and_split "subdi3_i" diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index ed2b827..ad2df26 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -328,7 +328,7 @@ Target Var(TARGET_Q_CLASS) Enable 'q' instruction alternatives. mexpand-adddi -Target Var(TARGET_EXPAND_ADDDI) +Target Warn(%qs is deprecated) Expand adddi3 and subdi3 at rtl generation time into add.f / adc etc. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 59563aa..b6cf4ce 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14823,7 +14823,7 @@ Enable pre-reload use of the @code{cbranchsi} pattern. @item -mexpand-adddi @opindex mexpand-adddi Expand @code{adddi3} and @code{subdi3} at RTL generation time into -@code{add.f}, @code{adc} etc. +@code{add.f}, @code{adc} etc. This option is deprecated. @item -mindexed-loads @opindex mindexed-loads -- 1.9.1