From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 119578 invoked by alias); 17 Aug 2017 14:19:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 119041 invoked by uid 89); 17 Aug 2017 14:19:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.5 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 17 Aug 2017 14:19:31 +0000 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7HEJ5ok017304 for ; Thu, 17 Aug 2017 10:19:29 -0400 Received: from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205]) by mx0a-001b2d01.pphosted.com with ESMTP id 2cdc4qk0hq-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 17 Aug 2017 10:19:28 -0400 Received: from localhost by e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 17 Aug 2017 10:19:27 -0400 Received: from b01cxnp22035.gho.pok.ibm.com (9.57.198.25) by e15.ny.us.ibm.com (146.89.104.202) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Thu, 17 Aug 2017 10:19:24 -0400 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v7HEJOxO29491374; Thu, 17 Aug 2017 14:19:24 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4BCA8AC058; Thu, 17 Aug 2017 10:19:44 -0400 (EDT) Received: from [9.10.86.107] (unknown [9.10.86.107]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 0E3F8AC03F; Thu, 17 Aug 2017 10:19:44 -0400 (EDT) Subject: [PATCH, rs6000] testcase coverage for vec_perm built-ins From: Will Schmidt Reply-To: will_schmidt@vnet.ibm.com To: GCC Patches Cc: Segher Boessenkool , "Carl E. Love" , Bill Schmidt , David Edelsohn Content-Type: text/plain; charset="UTF-8" Date: Thu, 17 Aug 2017 14:40:00 -0000 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 17081714-0036-0000-0000-0000025A54D7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007561; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000222; SDB=6.00903649; UDB=6.00452702; IPR=6.00683862; BA=6.00005538; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016739; XFM=3.00000015; UTC=2017-08-17 14:19:26 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17081714-0037-0000-0000-0000417866B3 Message-Id: <1502979563.14827.10.camel@brimstone.rchland.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-08-17_07:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1708170238 X-IsSubscribed: yes X-SW-Source: 2017-08/txt/msg01079.txt.bz2 Hi, [Patch, rs6000] testcase coverage for vec_perm built-ins Add some Testcase coverage for the vector permute intrinsics. Tested across power platforms. OK for trunk? Thanks, -Will [gcc/testsuite] 2017-08-17 Will Schmidt * gcc.target/powerpc/fold-vec-perm-char.c: New. * gcc.target/powerpc/fold-vec-perm-double.c: New. * gcc.target/powerpc/fold-vec-perm-float.c: New. * gcc.target/powerpc/fold-vec-perm-int.c: New. * gcc.target/powerpc/fold-vec-perm-longlong.c: New. * gcc.target/powerpc/fold-vec-perm-pixel.c: New. * gcc.target/powerpc/fold-vec-perm-short.c: New. diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c new file mode 100644 index 0000000..6ea5c2e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c @@ -0,0 +1,31 @@ +/* Verify that overloaded built-ins for vec_perm with char + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include + +vector bool char +testbc (vector bool char vbc2, vector bool char vbc3, + vector unsigned char vuc) +{ + return vec_perm (vbc2, vbc3, vuc); +} + +vector signed char +testsc (vector signed char vsc2, vector signed char vsc3, + vector unsigned char vuc) +{ + return vec_perm (vsc2, vsc3, vuc); +} + +vector unsigned char +testuc (vector unsigned char vuc2, vector unsigned char vuc3, + vector unsigned char vuc) +{ + return vec_perm (vuc2, vuc3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 3 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c new file mode 100644 index 0000000..1d6f811 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c @@ -0,0 +1,16 @@ +/* Verify that overloaded built-ins for vec_perm with + double inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include + +vector double +testd (vector double vd2, vector double vd3, vector unsigned char vuc) +{ + return vec_perm (vd2, vd3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c new file mode 100644 index 0000000..05b555c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c @@ -0,0 +1,16 @@ +/* Verify that overloaded built-ins for vec_perm with float + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include + +vector float +testf (vector float vf2, vector float vf3, vector unsigned char vuc) +{ + return vec_perm (vf2, vf3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c new file mode 100644 index 0000000..b72bf8f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c @@ -0,0 +1,31 @@ +/* Verify that overloaded built-ins for vec_perm with int + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include + +vector bool int +testbi (vector bool int vbi2, vector bool int vbi3, + vector unsigned char vuc) +{ + return vec_perm (vbi2, vbi3, vuc); +} + +vector signed int +testsi (vector signed int vsi2, vector signed int vsi3, + vector unsigned char vuc) +{ + return vec_perm (vsi2, vsi3, vuc); +} + +vector unsigned int +testui (vector unsigned int vui2, vector unsigned int vui3, + vector unsigned char vuc) +{ + return vec_perm (vui2, vui3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 3 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c new file mode 100644 index 0000000..cc191b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c @@ -0,0 +1,31 @@ +/* Verify that overloaded built-ins for vec_perm with long long + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include + +vector bool long long +testbl (vector bool long long vbl2, vector bool long long vbl3, + vector unsigned char vuc) +{ + return vec_perm (vbl2, vbl3, vuc); +} + +vector signed long long +testsl (vector signed long vsl2, vector signed long vsl3, + vector unsigned char vuc) +{ + return vec_perm (vsl2, vsl3, vuc); +} + +vector unsigned long long +testul (vector unsigned long long vul2, vector unsigned long long vul3, + vector unsigned char vuc) +{ + return vec_perm (vul2, vul3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 3 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c new file mode 100644 index 0000000..9f5c786 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c @@ -0,0 +1,16 @@ +/* Verify that overloaded built-ins for vec_perm with pixel + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include + +vector pixel +testpx (vector pixel px2, vector pixel px3, vector unsigned char vuc) +{ + return vec_perm (px2, px3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c new file mode 100644 index 0000000..d517c4e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c @@ -0,0 +1,29 @@ +/* Verify that overloaded built-ins for vec_perm with short + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include + +vector bool short +testbs (vector bool short vbs2, vector bool short vbs3, + vector unsigned char vuc) +{ + return vec_perm (vbs2, vbs3, vuc); +} + +vector signed short +testss (vector signed short vss2, vector signed short vss3, vector unsigned char vuc) +{ + return vec_perm (vss2, vss3, vuc); +} + +vector unsigned short +testus (vector unsigned short vus2, vector unsigned short vus3, vector unsigned char vuc) +{ + return vec_perm (vus2, vus3, vuc); +} + +/* { dg-final { scan-assembler-times "vperm" 3 } } */