From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 76575 invoked by alias); 26 Oct 2017 15:43:16 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 76564 invoked by uid 89); 26 Oct 2017 15:43:16 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=Hx-languages-length:1837 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 26 Oct 2017 15:43:15 +0000 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v9QFdaX4033115 for ; Thu, 26 Oct 2017 11:43:05 -0400 Received: from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208]) by mx0a-001b2d01.pphosted.com with ESMTP id 2dugkrf5du-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 26 Oct 2017 11:43:05 -0400 Received: from localhost by e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 26 Oct 2017 11:43:01 -0400 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v9QFh1NA41418894; Thu, 26 Oct 2017 15:43:01 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 67365112034; Thu, 26 Oct 2017 11:42:31 -0400 (EDT) Received: from [9.10.86.58] (unknown [9.10.86.58]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP id 32598112040; Thu, 26 Oct 2017 11:42:31 -0400 (EDT) Subject: Re: [PATCH, rs6000] 2/2 Add x86 SSE2 intrinsics to GCC PPC64LE target From: Steven Munroe Reply-To: munroesj@linux.vnet.ibm.com To: Segher Boessenkool Cc: gcc-patches , David Edelsohn In-Reply-To: <20171025233724.GJ4406@gate.crashing.org> References: <1508264836.7529.23.camel@oc7878010663> <20171025233724.GJ4406@gate.crashing.org> Content-Type: text/plain; charset="UTF-8" Date: Thu, 26 Oct 2017 15:46:00 -0000 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 17102615-0044-0000-0000-000003A5B0C2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007955; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000239; SDB=6.00936785; UDB=6.00472096; IPR=6.00717048; BA=6.00005660; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017726; XFM=3.00000015; UTC=2017-10-26 15:43:02 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17102615-0045-0000-0000-000007D4BE25 Message-Id: <1509032580.24987.16.camel@oc7878010663> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-10-26_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1710260206 X-SW-Source: 2017-10/txt/msg01961.txt.bz2 On Wed, 2017-10-25 at 18:37 -0500, Segher Boessenkool wrote: > Hi! > > On Tue, Oct 17, 2017 at 01:27:16PM -0500, Steven Munroe wrote: > > This it part 2/2 for contributing PPC64LE support for X86 SSE2 > > instrisics. This patch includes testsuite/gcc.target tests for the > > intrinsics included by emmintrin.h. > > > --- gcc/testsuite/gcc.target/powerpc/sse2-mmx.c (revision 0) > > +++ gcc/testsuite/gcc.target/powerpc/sse2-mmx.c (revision 0) > > @@ -0,0 +1,83 @@ > > +/* { dg-do run } */ > > +/* { dg-options "-O3 -mdirect-move" } */ > > +/* { dg-require-effective-target lp64 } */ > > +/* { dg-require-effective-target p8vector_hw } */ > > +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ > > Why this dg-skip-if? Also, why -mdirect-move? > this is weird test because it the effectively MMX style operations but added to IA under the SSE2 Technology. Normally mmintrin.h compare operations require a transfer to/from vector with direct move for efficient execution on power. The one exception to that is _mm_cmpeq_pi8 which can be implemented directly in GPRs using cmpb. The cmpb instruction is from power6 but I do not want to use -mcpu=power6 here. -mdirect-move is a compromise. I suspect that the dg-skip-if is an artifact of the early struggles to make this stuff work across various --withcpu= settings. I think the key is dg-require-effective-target p8vector_hw which should allow dropping both the -mdirect-move and the whole dg-skip-if clause. Will need to try this change and retest. > > Okay for trunk with that taken care of. Sorry it took a while. > > Have you tested this on big endian btw? > Yes. I have tested on P8 BE using --withcpu=[power6 | power7 | power8 ] > > Segher >