[Patch][aarch64] Add missing thunderx2-t99 instruction scheduling pipeline descriptions.

[Steve Ellcey <sellcey@cavium.com>]

There are a number of instruction types defined in aarch64.md which do not
have pipeline/scheduling information in thunderx2-t99.md.  This patch adds
some of them.  This patch includes all the missing types except the neon
ones that I hope to include in a follow-up patch.

Bootstrapped and tested with no regressions on a thunderx2.

I know we are in stage3 but I hope this type of plaform specific
change is still OK to checkin.

Steve Ellcey
sellcey@cavium.com


2017-11-30  Steve Ellcey  <sellcey@cavium.com>

	* config/aarch64/thunderx2-t99.md (thunderx2t99_branch): Add trap
	to reservation.
	(thunderx2t99_nothing): New insn reservation.
	(thunderx2t99_mrs): New insn reservation.
	(thunderx2t99_multiple): New insn reservation.
	(thunderx2t99_alu_basi): Add bfx to reservation.
	(thunderx2t99_fp_cmp): Add fccmps and fccmpd to reservation.


diff --git a/gcc/config/aarch64/thunderx2t99.md b/gcc/config/aarch64/thunderx2t99.md
index 5bcf4ff..5e48521 100644
--- a/gcc/config/aarch64/thunderx2t99.md
+++ b/gcc/config/aarch64/thunderx2t99.md
@@ -69,9 +69,26 @@
 
 (define_insn_reservation "thunderx2t99_branch" 1
   (and (eq_attr "tune" "thunderx2t99")
-       (eq_attr "type" "call,branch"))
+       (eq_attr "type" "call,branch,trap"))
   "thunderx2t99_i2")
 
+;; Misc instructions.
+
+(define_insn_reservation "thunderx2t99_nothing" 0
+  (and (eq_attr "tune" "thunderx2t99")
+       (eq_attr "type" "no_insn,block"))
+  "nothing")
+
+(define_insn_reservation "thunderx2t99_mrs" 0
+  (and (eq_attr "tune" "thunderx2t99")
+       (eq_attr "type" "mrs"))
+  "thunderx2t99_i2")
+
+(define_insn_reservation "thunderx2t99_multiple" 1
+  (and (eq_attr "tune" "thunderx2t99")
+       (eq_attr "type" "multiple"))
+  "thunderx2t99_i0+thunderx2t99_i1+thunderx2t99_i2+thunderx2t99_ls0+thunderx2t99_ls1+thunderx2t99_sd+thunderx2t99_i1m1+thunderx2t99_i1m2+thunderx2t99_i1m3+thunderx2t99_ls0d1+thunderx2t99_ls0d2+thunderx2t99_ls0d3+thunderx2t99_ls1d1+thunderx2t99_ls1d2+thunderx2t99_ls1d3+thunderx2t99_f0+thunderx2t99_f1")
+
 ;; Integer arithmetic/logic instructions.
 
 ; Plain register moves are handled by renaming, and don't create any uops.
@@ -87,7 +104,7 @@
 			adc_reg,adc_imm,adcs_reg,adcs_imm,\
 			logic_reg,logic_imm,logics_reg,logics_imm,\
 			csel,adr,mov_imm,shift_reg,shift_imm,bfm,\
-			rbit,rev,extend,rotate_imm"))
+			bfx,rbit,rev,extend,rotate_imm"))
   "thunderx2t99_i012")
 
 (define_insn_reservation "thunderx2t99_alu_shift" 2
@@ -155,7 +172,7 @@
 
 (define_insn_reservation "thunderx2t99_fp_cmp" 5
   (and (eq_attr "tune" "thunderx2t99")
-       (eq_attr "type" "fcmps,fcmpd"))
+       (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))
   "thunderx2t99_f01")
 
 (define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16