From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 34298 invoked by alias); 1 Dec 2017 18:42:32 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 34278 invoked by uid 89); 1 Dec 2017 18:42:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KB_WAM_FROM_NAME_SINGLEWORD,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=reservation, mrs, HContent-Transfer-Encoding:8bit X-HELO: NAM01-BY2-obe.outbound.protection.outlook.com Received: from mail-by2nam01on0049.outbound.protection.outlook.com (HELO NAM01-BY2-obe.outbound.protection.outlook.com) (104.47.34.49) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 01 Dec 2017 18:42:30 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Steve.Ellcey@cavium.com; Received: from sellcey-dt.caveonetworks.com (50.233.148.156) by DM5PR07MB3548.namprd07.prod.outlook.com (10.164.153.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.282.5; Fri, 1 Dec 2017 18:42:27 +0000 Message-ID: <1512153744.14842.3.camel@cavium.com> Subject: [Patch][aarch64] Add missing thunderx2-t99 instruction scheduling pipeline descriptions. From: Steve Ellcey Reply-To: sellcey@cavium.com To: gcc-patches , "richard.earnshaw" , Marcus Shawcroft , "james.greenhalgh" Date: Fri, 01 Dec 2017 18:42:00 -0000 Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MWHPR15CA0046.namprd15.prod.outlook.com (10.173.226.160) To DM5PR07MB3548.namprd07.prod.outlook.com (10.164.153.146) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 54c0cb4d-1aad-4261-2f97-08d538eb45b6 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(5600026)(4604075)(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(2017052603286);SRVR:DM5PR07MB3548; X-Microsoft-Exchange-Diagnostics: 1;DM5PR07MB3548;3:4GF2wKpZ1bmcZeZclLccBYNTvyM+nDAAx8J7KNgStVwalqhE1WEel626KVC49kZS2KPzb38O5/Z+nrXXAxKEXTAMOPUgNBVmBZLoxn8B6wycYosnBuzYfSWXfw2TbB4EopzMTO7VT459GotdZdgzzQ+YfZFLw/T64ar93+U/yX0ki+4Va0T35qETo4xhgIf1sjKxuwFNUawMSfj6V9UhP3SNCiOrjFOGj/Iuqsl9TIffoeAOio+y52C4H47iWboo;25:OAwRJGKGS0cQuR+PJ0rkXmrO+EDmxxppnreD7K8VDnnO/IoCCt+63nh6wMlFN0gXvEtaILOO73TC2Ngc3iV4GnvbPQoXdocXSDm+GcZg3SxFQm3S+PzA5jp3/+JViq60ZqX1LUYrRhvxDFUelsaJdDt042I50fe0ZrrazxvJ8yf6/LFIRH8V8BGylneriZnAH3J/OXsZtw+DaykH1ZIZlsp2QviBakb+zrfXZ8bVKnfkTyoOL8+3Gd2NgKqiFsqR2eEUZxkvMTafmwWqx6Hwn5Q8NDc9cvpC6PMpVZuSkkmRlaIt1hSDsTDOPVkOqXvzwwXAdsLsEDjH5nCIh0pUnw==;31:0lDKMHF45U5vqqFHHAsqjo0CWclqa30PQ5K9iJgTXw7Sk4uKHjfVBFJ7VTdbUCexcbgBudlfgJtNZbLeNEgmto6zwVFGnE90eDDy5esSb/cEPkxruJ+fzqwb4BNFhmk1bK8DMCDPIPI1ukQRqN9jktMxfhf5k/RTjN7GQhhP/s7xBcfYi3BY5HDm4LOt61vmeGr5JFsnjyXbgc7fS8NacB0vseydkHYIoKP+IP9ZfHY= X-MS-TrafficTypeDiagnostic: DM5PR07MB3548: X-Microsoft-Exchange-Diagnostics: 1;DM5PR07MB3548;20:HIqYJW5/6byO4qzcSioc9Lb5B65CPjNV0UDLEXt93sSRRPxSWOPcdesorZXsHhZRJVKpn4GBf9lpgYDYUGXCGx3k0YnnZ9X0ps5fA+OLT/CuzxgFeutCOPkpCxPTdviekVoL5CcxrLvf5PSkylPhFU8TIBO3MNBFSMEFVcGblTBp6o4+sS8/1gAjGrPYyo3MjGXmhmzKXRe3E/i+S99n8DplL9Og/5qh3r0FhlemyEVbkPadFSsM9bZw5dxWYInGv39wrDo0Z/t+xiWgIGBmx2b+UgGYcqJtUTYaP5IQNKNpNQzJ6q6C+ZhPaU+6fU1o5hUST9NtfmhKn1fyl9RSS2GP6zF2HBTDXbDlum/Qu1Nf/n9+5bx+GMA3iI5TilGsOj7YSbjNGkYUDQmMV93OYrRrH74LtPcPI4jJV4hAsSgWlLu4qno4qKwoNkyTWCPA9Go+Wd8/n6uJ3yoJW1/QbLFPHyPQfj3jNUol8ANk5AEHjSjU24ZieZylNSxr8ZB7;4:x4ql3/KmLoFrgjY7JJhCMzqwXLavdWsiv6WLCyyoGmvhzGpsaVyqran+3033Rcn+W371AXDluNCid694oyIRXVY8r6ZnYMRgVTGK10oekFwcWgXm/q0rMZ4EGwrJ5zNjGVnTW/abwTtOC2BZWP/6R2EUYU3OJqKNix+bOzC1zeUsjTl0LRFmgF6AqK2zQxbINkf9wfRztR2mfFR3kB6XYep4aR54HjW0jKnjGTqzqiV2U+qfIQdOkutu6wGt08hS+UNd2rAn/L/y5rSs8Qvn5g== X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; 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Bootstrapped and tested with no regressions on a thunderx2. I know we are in stage3 but I hope this type of plaform specific change is still OK to checkin. Steve Ellcey sellcey@cavium.com 2017-11-30  Steve Ellcey   * config/aarch64/thunderx2-t99.md (thunderx2t99_branch): Add trap to reservation. (thunderx2t99_nothing): New insn reservation. (thunderx2t99_mrs): New insn reservation. (thunderx2t99_multiple): New insn reservation. (thunderx2t99_alu_basi): Add bfx to reservation. (thunderx2t99_fp_cmp): Add fccmps and fccmpd to reservation. diff --git a/gcc/config/aarch64/thunderx2t99.md b/gcc/config/aarch64/thunderx2t99.md index 5bcf4ff..5e48521 100644 --- a/gcc/config/aarch64/thunderx2t99.md +++ b/gcc/config/aarch64/thunderx2t99.md @@ -69,9 +69,26 @@    (define_insn_reservation "thunderx2t99_branch" 1    (and (eq_attr "tune" "thunderx2t99") -       (eq_attr "type" "call,branch")) +       (eq_attr "type" "call,branch,trap"))    "thunderx2t99_i2")   +;; Misc instructions. + +(define_insn_reservation "thunderx2t99_nothing" 0 +  (and (eq_attr "tune" "thunderx2t99") +       (eq_attr "type" "no_insn,block")) +  "nothing") + +(define_insn_reservation "thunderx2t99_mrs" 0 +  (and (eq_attr "tune" "thunderx2t99") +       (eq_attr "type" "mrs")) +  "thunderx2t99_i2") + +(define_insn_reservation "thunderx2t99_multiple" 1 +  (and (eq_attr "tune" "thunderx2t99") +       (eq_attr "type" "multiple")) +  "thunderx2t99_i0+thunderx2t99_i1+thunderx2t99_i2+thunderx2t99_ls0+thunderx2t99_ls1+thunderx2t99_sd+thunderx2t99_i1m1+thunderx2t99_i1m2+thunderx2t99_i1m3+thunderx2t99_ls0d1+thunderx2t99_ls0d2+thunderx2t99_ls0d3+thunderx2t99_ls1d1+thunderx2t99_ls1d2+thunderx2t99_ls1d3+thunderx2t99_f0+thunderx2t99_f1") +  ;; Integer arithmetic/logic instructions.    ; Plain register moves are handled by renaming, and don't create any uops. @@ -87,7 +104,7 @@   adc_reg,adc_imm,adcs_reg,adcs_imm,\   logic_reg,logic_imm,logics_reg,logics_imm,\   csel,adr,mov_imm,shift_reg,shift_imm,bfm,\ - rbit,rev,extend,rotate_imm")) + bfx,rbit,rev,extend,rotate_imm"))    "thunderx2t99_i012")    (define_insn_reservation "thunderx2t99_alu_shift" 2 @@ -155,7 +172,7 @@    (define_insn_reservation "thunderx2t99_fp_cmp" 5    (and (eq_attr "tune" "thunderx2t99") -       (eq_attr "type" "fcmps,fcmpd")) +       (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))    "thunderx2t99_f01")    (define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16