From: Steve Ellcey <sellcey@cavium.com>
To: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>,
gcc-patches <gcc-patches@gcc.gnu.org>,
"james.greenhalgh" <james.greenhalgh@arm.com>,
Marcus Shawcroft <Marcus.Shawcroft@arm.com>,
Christophe Lyon <christophe.lyon@linaro.org>
Subject: Re: [Patch][aarch64][PR target/83335] Fix regression, ICE on gcc.target/aarch64/asm-2.c
Date: Sat, 17 Feb 2018 00:05:00 -0000 [thread overview]
Message-ID: <1518825893.6296.12.camel@cavium.com> (raw)
In-Reply-To: <f16c4b72-b568-6670-6b46-82af8a47b061@arm.com>
On Thu, 2018-02-15 at 14:01 +0000, Richard Earnshaw (lists) wrote:
>Â
> Wouldn't it be better to call output_operand_lossage() with a suitable
> diagnostic message?  If the operand isn't in Pmode assembly will
> (should) fail anyway.
>
> R.
How about this patch? Â In addtion to the code change I updated asm-2.c
with the error message that you getin ILP32 mode and I added asm-4.c
which does not give an error message in either LP64 or ILP32 mode.
Steve Ellcey
sellcey@cavium.com
2018-02-16  Steve Ellcey  <sellcey@cavium.com>
PR target/83335
* config/aarch64/aarch64.c (aarch64_print_address_internal):
Change gcc_assert call to output_operand_lossage.
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 7c9c6e5..34b75f8 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -7044,7 +7044,8 @@ aarch64_print_address_internal (FILE *f, machine_mode mode, rtx x,
   unsigned int size;
Â
   /* Check all addresses are Pmode - including ILP32.  */
-Â Â gcc_assert (GET_MODE (x) == Pmode);
+Â Â if (GET_MODE (x) != Pmode)
+Â Â Â Â output_operand_lossage ("invalid address mode");
Â
   if (aarch64_classify_address (&addr, x, mode, true, type))
     switch (addr.type)
2018-02-16  Steve Ellcey  <sellcey@cavium.com>
PR target/83335
* gcc/testsuite/gcc.target/aarch64/asm-2.c: Add dg-error for
ILP32 mode.
* gcc/testsuite/gcc.target/aarch64/asm-4.c: New test.
diff --git a/gcc/testsuite/gcc.target/aarch64/asm-2.c b/gcc/testsuite/gcc.target/aarch64/asm-2.c
index 3f978f5..65b3a84 100644
--- a/gcc/testsuite/gcc.target/aarch64/asm-2.c
+++ b/gcc/testsuite/gcc.target/aarch64/asm-2.c
@@ -6,5 +6,5 @@ int x;
 void
 f (void)
 {
-Â Â asm volatile ("%a0" :: "X" (&x));
+Â Â asm volatile ("%a0" :: "X" (&x)); /* { dg-error "invalid address mode" "" { target ilp32 } } */
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/asm-4.c b/gcc/testsuite/gcc.target/aarch64/asm-4.c
index e69de29..abe2af5 100644
--- a/gcc/testsuite/gcc.target/aarch64/asm-4.c
+++ b/gcc/testsuite/gcc.target/aarch64/asm-4.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O0" } */
+
+int x;
+
+void
+f (void)
+{
+Â Â asm volatile ("%a0" :: "X" (__builtin_extend_pointer (&x)));
+}
next prev parent reply other threads:[~2018-02-17 0:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-05 22:14 Steve Ellcey
2018-02-15 9:49 ` AArch64 patch ping Jakub Jelinek
2018-02-15 14:01 ` [Patch][aarch64][PR target/83335] Fix regression, ICE on gcc.target/aarch64/asm-2.c Richard Earnshaw (lists)
2018-02-17 0:05 ` Steve Ellcey [this message]
2018-02-19 15:32 ` Richard Earnshaw (lists)
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