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From: Carl Love <cel@us.ibm.com>
To: Segher Boessenkool <segher@kernel.crashing.org>,
	gcc-patches@gcc.gnu.org,
	       David Edelsohn <dje.gcc@gmail.com>
Cc: Bill Schmidt <wschmidt@linux.vnet.ibm.com>, cel@us.ibm.com
Subject: [PATCH,rs6000] PR 844422 Fix FCTID, FCTIW with -mcpu=power7
Date: Thu, 15 Mar 2018 15:07:00 -0000	[thread overview]
Message-ID: <1521126020.7699.16.camel@us.ibm.com> (raw)

GCC Maintainers:

The following patch fixes an ICE when compiling the test case

  gcc -mcpu=power7 builtin-fctid-fctiw-runnable.c

The GCC compiler now gives a message 

    "error: builtin function ‘__builtin_fctiw’ requires the ‘-mpower8-
vector’ option" 

and exits without generating an internal error.

The patch has been tested by compiling by hand as given above.  The
regression testing has also been done on

  powerpc64-unknown-linux-gnu (Power 8 BE)
  powerpc64le-unknown-linux-gnu (Power 8 LE)
  powerpc64le-unknown-linux-gnu (Power 9 LE)

with no regressions.

Let me know if the patch looks OK or not. Thanks.

               Carl Love

-------------------------------------------------------------

gcc/ChangeLog:

2018-03-15  Carl Love  <cel@us.ibm.com>

	PR target/84422
	* config/rs6000/rs6000-builtin.def: Change macro expansion for FCTID,
	FCTIW to BU_P8V_MISC_1.
---
 gcc/config/rs6000/rs6000-builtin.def | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 783ecff..9925364 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -658,6 +658,14 @@
 /* Miscellaneous builtins for instructions added in ISA 2.07.  These
    instructions do require the ISA 2.07 vector support, but they aren't vector
    instructions.  */
+#define BU_P8V_MISC_1(ENUM, NAME, ATTR, ICODE)				\
+  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
+		    "__builtin_" NAME,			/* NAME */	\
+		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
+		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
+		     | RS6000_BTC_UNARY),				\
+		    CODE_FOR_ ## ICODE)			/* ICODE */
+
 #define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE)				\
   RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
@@ -1881,8 +1889,8 @@ BU_VSX_OVERLOAD_X (XST,	     "xst")
 BU_VSX_OVERLOAD_X (XST_BE,   "xst_be")
 \f
 /* 1 argument builtins pre ISA 2.04.  */
-BU_FP_MISC_1 (FCTID,		"fctid",	CONST,  lrintdfdi2)
-BU_FP_MISC_1 (FCTIW,		"fctiw",	CONST,	lrintsfsi2)
+BU_P8V_MISC_1 (FCTID,		"fctid",	CONST,  lrintdfdi2)
+BU_P8V_MISC_1 (FCTIW,		"fctiw",	CONST,	lrintsfsi2)
 
 /* 2 argument CMPB instructions added in ISA 2.05. */
 BU_P6_2 (CMPB_32,        "cmpb_32",	CONST,	cmpbsi3)
-- 
2.7.4

                 reply	other threads:[~2018-03-15 15:00 UTC|newest]

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