From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 65920 invoked by alias); 31 Aug 2018 17:54:08 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 65911 invoked by uid 89); 31 Aug 2018 17:54:07 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy=2018-08-20, 20180820, sk:load_pa X-HELO: NAM03-BY2-obe.outbound.protection.outlook.com Received: from mail-by2nam03on0083.outbound.protection.outlook.com (HELO NAM03-BY2-obe.outbound.protection.outlook.com) (104.47.42.83) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 31 Aug 2018 17:54:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=fs7UuvrlPGxTCa5j8xO5y7eAmLhAGCiHeT2kzP2twq4=; b=oR9E53Kr9DyP4xDG+p5AVA8uejQDW3qe7hwMH4QvhuGRhAyAbzXUXuDWwVnEwgw2/MRMsQtwS7joepdO8kEvl70QVysmQmUgps+ebDGWC03ahA4prkkuRdEnC/lLgdlv1xsvsBqxd4iJYSNS+cZvvcbsZUXKTi8+1W5G+wkTlmk= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Steve.Ellcey@cavium.com; Received: from sellcey-dt.caveonetworks.com (50.233.148.155) by SN6PR07MB5040.namprd07.prod.outlook.com (2603:10b6:805:ad::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1080.17; Fri, 31 Aug 2018 17:54:01 +0000 Message-ID: <1535738038.7683.41.camel@cavium.com> Subject: Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute From: Steve Ellcey Reply-To: sellcey@cavium.com To: Segher Boessenkool Cc: Kyrill Tkachov , gcc-patches , Wilco Dijkstra , Richard Sandiford , Richard Earnshaw , James Greenhalgh , Marcus Shawcroft Date: Fri, 31 Aug 2018 17:54:00 -0000 In-Reply-To: <1534786623.20144.12.camel@cavium.com> References: <1533075888.3879.14.camel@cavium.com> <5B61A40E.1040501@foss.arm.com> <1533593632.3879.90.camel@cavium.com> <20180807171509.GH31204@gate.crashing.org> <1534786623.20144.12.camel@cavium.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-Path: sellcey@cavium.com Received-SPF: None (protection.outlook.com: cavium.com does not designate permitted sender hosts) X-SW-Source: 2018-08/txt/msg02061.txt.bz2 Ping.  Any feedback from the Aarch64 maintainers? Steve Ellcey sellcey@cavium.com On Mon, 2018-08-20 at 10:37 -0700, Steve Ellcey wrote: > On Tue, 2018-08-07 at 12:15 -0500, Segher Boessenkool wrote: > > > > > > > > > +/* { dg-final { scan-assembler-not "\[ \t\]stp\tq\[01234567\]" } > > > } > > > */ > > That's [0-7] but maybe you find [01234567] more readable here. > Segher,  I fixed all the issues you pointed out except this one. >  Since > there are some uses of non consecutive numbers in one of the tests I  > decided to leave [01234567] instead of using [0-7].  Here is the  > latest version of the patch, there are no semantic changes, just > syntactical ones to address the issues that you pointed out. > > Steve Ellcey > sellcey@cavium.com > > > 2018-08-20  Steve Ellcey   > > * config/aarch64/aarch64-protos.h > (aarch64_use_simple_return_insn_p): > New prototype. > (aarch64_epilogue_uses): Ditto. > * config/aarch64/aarch64.c (aarch64_attribute_table): New > array. > (aarch64_simd_decl_p): New function. > (aarch64_reg_save_mode): New function. > (aarch64_is_simd_call_p): New function. > (aarch64_function_ok_for_sibcall): Check for simd calls. > (aarch64_layout_frame): Check for simd function. > (aarch64_gen_storewb_pair): Handle E_TFmode. > (aarch64_push_regs): Use aarch64_reg_save_mode to get mode. > (aarch64_gen_loadwb_pair): Handle E_TFmode. > (aarch64_pop_regs): Use aarch64_reg_save_mode to get mode. > (aarch64_gen_store_pair): Handle E_TFmode. > (aarch64_gen_load_pair): Ditto. > (aarch64_save_callee_saves): Handle different mode sizes. > (aarch64_restore_callee_saves): Ditto. > (aarch64_components_for_bb): Check for simd function. > (aarch64_epilogue_uses): New function. > (aarch64_process_components): Check for simd function. > (aarch64_expand_prologue): Ditto. > (aarch64_expand_epilogue): Ditto. > (aarch64_expand_call): Ditto. > (TARGET_ATTRIBUTE_TABLE): New define. > * config/aarch64/aarch64.h (EPILOGUE_USES): Redefine. > (FP_SIMD_SAVED_REGNUM_P): New macro. > * config/aarch64/aarch64.md (V23_REGNUM) New constant. > (simple_return): New define_expand. > (load_pair_dw_tftf): New instruction. > (store_pair_dw_tftf): Ditto. > (loadwb_pair_): Ditto. > ("storewb_pair_): Ditto. > > 2018-08-20  Steve Ellcey   > > * gcc.target/aarch64/torture/aarch64-torture.exp: New file. > * gcc.target/aarch64/torture/simd-abi-1.c: New test. > * gcc.target/aarch64/torture/simd-abi-2.c: Ditto. > * gcc.target/aarch64/torture/simd-abi-3.c: Ditto. > * gcc.target/aarch64/torture/simd-abi-4.c: Ditto.