* [GCC][IRA] Revert 11b8091fb to fix Bug 93221
@ 2020-01-21 18:35 Joel Hutton
2020-01-21 19:27 ` Vladimir Makarov
2020-01-21 20:04 ` [GCC][IRA] " Jakub Jelinek
0 siblings, 2 replies; 10+ messages in thread
From: Joel Hutton @ 2020-01-21 18:35 UTC (permalink / raw)
To: gcc-patches; +Cc: vmakarov, nd, ebotcazou
[-- Attachment #1: Type: text/plain, Size: 915 bytes --]
Hi all,
A previous change to simplify LRA introduced in 11b809 (From-SVN:
r279550) disabled hard register splitting for -O0. This causes a problem
on aarch64 in cases where parameters are passed in multiple registers
(in the bug report an OI passed in 2 V4SI registers). This is mandated
by the AAPCS.
Vlad, Eric, do you have a preferred alternate solution to reverting the
patch?
Previously discussed here:
https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01414.html
Bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93221
Bootstrapped and regression tested on aarch64
Changelog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com\>
* ira.c (ira): Revert use of simplified LRA algorithm.
gcc/testsuite/ChangeLog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com\>
PR bug/93221
* gcc.target/aarch64/pr93221.c: New test.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch --]
[-- Type: text/x-patch; name="0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch", Size: 3172 bytes --]
From 0d9980d2327c61eb99d041a217d6ea5c5b34c754 Mon Sep 17 00:00:00 2001
From: Joel Hutton <Joel.Hutton@arm.com>
Date: Tue, 21 Jan 2020 09:37:48 +0000
Subject: [PATCH] [IRA] Fix bug 93221 by reverting 11b8091fb
11b8091fb introduced a simplified LRA algorithm for -O0 that turned off
hard register splitting, this causes a problem for parameters passed in
multiple registers on aarch64. This fixes bug 93221.
---
gcc/ira.c | 38 +++++++++-------------
gcc/testsuite/gcc.target/aarch64/pr93221.c | 10 ++++++
2 files changed, 25 insertions(+), 23 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr93221.c
diff --git a/gcc/ira.c b/gcc/ira.c
index 46091adf8109263c72343dccfe4913857b5c74ae..c8b5f869da121506f0414901271eae9810689316 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -5205,35 +5205,27 @@ ira (FILE *f)
/* Perform target specific PIC register initialization. */
targetm.init_pic_reg ();
- if (optimize)
- {
- ira_conflicts_p = true;
-
- /* Determine the number of pseudos actually requiring coloring. */
- unsigned int num_used_regs = 0;
- for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
- if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
- num_used_regs++;
-
- /* If there are too many pseudos and/or basic blocks (e.g. 10K
- pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
- use simplified and faster algorithms in LRA. */
- lra_simple_p
- = ira_use_lra_p
- && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
- }
- else
- {
- ira_conflicts_p = false;
- lra_simple_p = ira_use_lra_p;
- }
+ ira_conflicts_p = optimize > 0;
+
+ /* Determine the number of pseudos actually requiring coloring. */
+ unsigned int num_used_regs = 0;
+ for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
+ if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
+ num_used_regs++;
+
+ /* If there are too many pseudos and/or basic blocks (e.g. 10K
+ pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
+ use simplified and faster algorithms in LRA. */
+ lra_simple_p
+ = ira_use_lra_p
+ && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
if (lra_simple_p)
{
/* It permits to skip live range splitting in LRA. */
flag_caller_saves = false;
/* There is no sense to do regional allocation when we use
- simplified LRA. */
+ simplified LRA. */
flag_ira_region = IRA_REGION_ONE;
ira_conflicts_p = false;
}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr93221.c b/gcc/testsuite/gcc.target/aarch64/pr93221.c
new file mode 100644
index 0000000000000000000000000000000000000000..517135a889de8a7e379c79222f8a8b2efcc7b422
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93221.c
@@ -0,0 +1,10 @@
+/* PR bug/93221 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mno-omit-leaf-frame-pointer" } */
+
+struct S { __Int32x4_t b[2]; };
+
+void __attribute__((optimize (0)))
+foo (struct S x)
+{
+}
--
2.17.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-21 18:35 [GCC][IRA] Revert 11b8091fb to fix Bug 93221 Joel Hutton
@ 2020-01-21 19:27 ` Vladimir Makarov
2020-01-27 15:54 ` [Ping][GCC][IRA] " Joel Hutton
2020-01-21 20:04 ` [GCC][IRA] " Jakub Jelinek
1 sibling, 1 reply; 10+ messages in thread
From: Vladimir Makarov @ 2020-01-21 19:27 UTC (permalink / raw)
To: Joel Hutton, gcc-patches; +Cc: nd, ebotcazou
On 1/21/20 12:20 PM, Joel Hutton wrote:
> Hi all,
>
> A previous change to simplify LRA introduced in 11b809 (From-SVN:
> r279550) disabled hard register splitting for -O0. This causes a problem
> on aarch64 in cases where parameters are passed in multiple registers
> (in the bug report an OI passed in 2 V4SI registers). This is mandated
> by the AAPCS.
I see. I suspected that it can cause the problem but I thought the
probability is very small for this. I was wrong. We should revert it
at least for now. Correct work of GCC is more important than saving
cycles in -O0 mode.
> Vlad, Eric, do you have a preferred alternate solution to reverting the
> patch?
I am in favour of reverting the patch now. But may be Eric can provide
another version of the patch not causing the arm problem. I am ready to
reconsider this too. So I guess the decision is upto Eric.
> Previously discussed here:
> https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01414.html
> Bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93221
>
> Bootstrapped and regression tested on aarch64
>
> Changelog:
>
> 2020-01-21 Joel Hutton <Joel.Hutton@arm.com\>
>
> * ira.c (ira): Revert use of simplified LRA algorithm.
>
> gcc/testsuite/ChangeLog:
>
> 2020-01-21 Joel Hutton <Joel.Hutton@arm.com\>
>
> PR bug/93221
> * gcc.target/aarch64/pr93221.c: New test.
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-21 18:35 [GCC][IRA] Revert 11b8091fb to fix Bug 93221 Joel Hutton
2020-01-21 19:27 ` Vladimir Makarov
@ 2020-01-21 20:04 ` Jakub Jelinek
2020-01-21 21:06 ` Joel Hutton
1 sibling, 1 reply; 10+ messages in thread
From: Jakub Jelinek @ 2020-01-21 20:04 UTC (permalink / raw)
To: Joel Hutton; +Cc: gcc-patches, vmakarov, nd, ebotcazou
On Tue, Jan 21, 2020 at 05:20:51PM +0000, Joel Hutton wrote:
> 2020-01-21 Joel Hutton <Joel.Hutton@arm.com\>
>
> * ira.c (ira): Revert use of simplified LRA algorithm.
>
> gcc/testsuite/ChangeLog:
>
> 2020-01-21 Joel Hutton <Joel.Hutton@arm.com\>
>
> PR bug/93221
> * gcc.target/aarch64/pr93221.c: New test.
Not a review, just nitpicking. Please avoid the backslash before >.
The PR number should go to both gcc/ and gcc/testsuite/ ChangeLog
entry and we don't have bug/ category; the bug is target category,
so it should be PR target/93221, or could be reclassified first in
bugzilla e.g. to middle-end and then written as PR middle-end/93221.
> @@ -0,0 +1,10 @@
> +/* PR bug/93221 */
Likewise here.
> +/* { dg-do compile } */
> +/* { dg-options "-O0 -mno-omit-leaf-frame-pointer" } */
> +
> +struct S { __Int32x4_t b[2]; };
> +
> +void __attribute__((optimize (0)))
Not sure if I understand why do you need optimize (0) attribute when the
whole test is compiled with -O0. Doesn't it ICE without the attribute
too?
> +foo (struct S x)
> +{
> +}
Jakub
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-21 20:04 ` [GCC][IRA] " Jakub Jelinek
@ 2020-01-21 21:06 ` Joel Hutton
2020-01-21 21:36 ` Joel Hutton
0 siblings, 1 reply; 10+ messages in thread
From: Joel Hutton @ 2020-01-21 21:06 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: gcc-patches, vmakarov, nd, ebotcazou
[-- Attachment #1: Type: text/plain, Size: 711 bytes --]
On 21/01/2020 19:26, Jakub Jelinek wrote:
> Not a review, just nitpicking. Please avoid the backslash before >.
> The PR number should go to both gcc/ and gcc/testsuite/ ChangeLog
> entry and we don't have bug/ category; the bug is target category,
> so it should be PR target/93221, or could be reclassified first in
> bugzilla e.g. to middle-end and then written as PR middle-end/93221.
>
Done
>> @@ -0,0 +1,10 @@
>> +/* PR bug/93221 */
> Likewise here.
Done
> Not sure if I understand why do you need optimize (0) attribute when the
> whole test is compiled with -O0. Doesn't it ICE without the attribute
> too?
Done. It's not really necessary, belt and braces.
Updated patch attached
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch --]
[-- Type: text/x-patch; name="0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch", Size: 3145 bytes --]
From 1a2980ef6eeb76dbf0556f806a85a4f49ad3ebdd Mon Sep 17 00:00:00 2001
From: Joel Hutton <Joel.Hutton@arm.com>
Date: Tue, 21 Jan 2020 09:37:48 +0000
Subject: [PATCH] [IRA] Fix bug 93221 by reverting 11b8091fb
11b8091fb introduced a simplified LRA algorithm for -O0 that turned off
hard register splitting, this causes a problem for parameters passed in
multiple registers on aarch64. This fixes bug 93221.
---
gcc/ira.c | 38 +++++++++-------------
gcc/testsuite/gcc.target/aarch64/pr93221.c | 10 ++++++
2 files changed, 25 insertions(+), 23 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr93221.c
diff --git a/gcc/ira.c b/gcc/ira.c
index 46091adf8109263c72343dccfe4913857b5c74ae..c8b5f869da121506f0414901271eae9810689316 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -5205,35 +5205,27 @@ ira (FILE *f)
/* Perform target specific PIC register initialization. */
targetm.init_pic_reg ();
- if (optimize)
- {
- ira_conflicts_p = true;
-
- /* Determine the number of pseudos actually requiring coloring. */
- unsigned int num_used_regs = 0;
- for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
- if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
- num_used_regs++;
-
- /* If there are too many pseudos and/or basic blocks (e.g. 10K
- pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
- use simplified and faster algorithms in LRA. */
- lra_simple_p
- = ira_use_lra_p
- && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
- }
- else
- {
- ira_conflicts_p = false;
- lra_simple_p = ira_use_lra_p;
- }
+ ira_conflicts_p = optimize > 0;
+
+ /* Determine the number of pseudos actually requiring coloring. */
+ unsigned int num_used_regs = 0;
+ for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
+ if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
+ num_used_regs++;
+
+ /* If there are too many pseudos and/or basic blocks (e.g. 10K
+ pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
+ use simplified and faster algorithms in LRA. */
+ lra_simple_p
+ = ira_use_lra_p
+ && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
if (lra_simple_p)
{
/* It permits to skip live range splitting in LRA. */
flag_caller_saves = false;
/* There is no sense to do regional allocation when we use
- simplified LRA. */
+ simplified LRA. */
flag_ira_region = IRA_REGION_ONE;
ira_conflicts_p = false;
}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr93221.c b/gcc/testsuite/gcc.target/aarch64/pr93221.c
new file mode 100644
index 0000000000000000000000000000000000000000..4dc2c3d0149423dd3d666f7428277ffa9eb765c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93221.c
@@ -0,0 +1,10 @@
+/* PR target/93221 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mno-omit-leaf-frame-pointer" } */
+
+struct S { __Int32x4_t b[2]; };
+
+void
+foo (struct S x)
+{
+}
--
2.17.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-21 21:06 ` Joel Hutton
@ 2020-01-21 21:36 ` Joel Hutton
2020-01-21 21:39 ` Joel Hutton
0 siblings, 1 reply; 10+ messages in thread
From: Joel Hutton @ 2020-01-21 21:36 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: gcc-patches, vmakarov, nd, ebotcazou
Updated changelog:
Changelog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com><mailto:Joel.Hutton@arm.com>
PR target/93221
* ira.c (ira): Revert use of simplified LRA algorithm.
gcc/testsuite/ChangeLog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com><mailto:Joel.Hutton@arm.com>
PR target/93221
* gcc.target/aarch64/pr93221.c: New test.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-21 21:36 ` Joel Hutton
@ 2020-01-21 21:39 ` Joel Hutton
0 siblings, 0 replies; 10+ messages in thread
From: Joel Hutton @ 2020-01-21 21:39 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: gcc-patches, vmakarov, nd, ebotcazou
Changelog was mangled by thunderbird, updated changelog:
Changelog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* ira.c (ira): Revert use of simplified LRA algorithm.
gcc/testsuite/ChangeLog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* gcc.target/aarch64/pr93221.c: New test.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Ping][GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-21 19:27 ` Vladimir Makarov
@ 2020-01-27 15:54 ` Joel Hutton
2020-01-28 9:31 ` Eric Botcazou
0 siblings, 1 reply; 10+ messages in thread
From: Joel Hutton @ 2020-01-27 15:54 UTC (permalink / raw)
To: Vladimir Makarov, gcc-patches; +Cc: nd, ebotcazou
[-- Attachment #1: Type: text/plain, Size: 958 bytes --]
Ping! Eric, do you have any objections to reverting?
On 21/01/2020 19:16, Vladimir Makarov wrote:
> I am in favour of reverting the patch now. But may be Eric can provide
> another version of the patch not causing the arm problem. I am ready to
> reconsider this too. So I guess the decision is upto Eric.
Eric did previously say "Feel free to eventually revert it.", but I
hoped he would reply on this thread.
--- Comment #7 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Probably missing live range splitting or somesuch, as envisioned by
Vladimir in
its approval message. Feel free to eventually revert it.
Changelog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* ira.c (ira): Revert use of simplified LRA algorithm.
gcc/testsuite/ChangeLog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* gcc.target/aarch64/pr93221.c: New test.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch --]
[-- Type: text/x-patch; name="0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch", Size: 3145 bytes --]
From 1a2980ef6eeb76dbf0556f806a85a4f49ad3ebdd Mon Sep 17 00:00:00 2001
From: Joel Hutton <Joel.Hutton@arm.com>
Date: Tue, 21 Jan 2020 09:37:48 +0000
Subject: [PATCH] [IRA] Fix bug 93221 by reverting 11b8091fb
11b8091fb introduced a simplified LRA algorithm for -O0 that turned off
hard register splitting, this causes a problem for parameters passed in
multiple registers on aarch64. This fixes bug 93221.
---
gcc/ira.c | 38 +++++++++-------------
gcc/testsuite/gcc.target/aarch64/pr93221.c | 10 ++++++
2 files changed, 25 insertions(+), 23 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr93221.c
diff --git a/gcc/ira.c b/gcc/ira.c
index 46091adf8109263c72343dccfe4913857b5c74ae..c8b5f869da121506f0414901271eae9810689316 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -5205,35 +5205,27 @@ ira (FILE *f)
/* Perform target specific PIC register initialization. */
targetm.init_pic_reg ();
- if (optimize)
- {
- ira_conflicts_p = true;
-
- /* Determine the number of pseudos actually requiring coloring. */
- unsigned int num_used_regs = 0;
- for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
- if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
- num_used_regs++;
-
- /* If there are too many pseudos and/or basic blocks (e.g. 10K
- pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
- use simplified and faster algorithms in LRA. */
- lra_simple_p
- = ira_use_lra_p
- && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
- }
- else
- {
- ira_conflicts_p = false;
- lra_simple_p = ira_use_lra_p;
- }
+ ira_conflicts_p = optimize > 0;
+
+ /* Determine the number of pseudos actually requiring coloring. */
+ unsigned int num_used_regs = 0;
+ for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
+ if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
+ num_used_regs++;
+
+ /* If there are too many pseudos and/or basic blocks (e.g. 10K
+ pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
+ use simplified and faster algorithms in LRA. */
+ lra_simple_p
+ = ira_use_lra_p
+ && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
if (lra_simple_p)
{
/* It permits to skip live range splitting in LRA. */
flag_caller_saves = false;
/* There is no sense to do regional allocation when we use
- simplified LRA. */
+ simplified LRA. */
flag_ira_region = IRA_REGION_ONE;
ira_conflicts_p = false;
}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr93221.c b/gcc/testsuite/gcc.target/aarch64/pr93221.c
new file mode 100644
index 0000000000000000000000000000000000000000..4dc2c3d0149423dd3d666f7428277ffa9eb765c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93221.c
@@ -0,0 +1,10 @@
+/* PR target/93221 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mno-omit-leaf-frame-pointer" } */
+
+struct S { __Int32x4_t b[2]; };
+
+void
+foo (struct S x)
+{
+}
--
2.17.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Ping][GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-27 15:54 ` [Ping][GCC][IRA] " Joel Hutton
@ 2020-01-28 9:31 ` Eric Botcazou
2020-01-28 10:01 ` Joel Hutton
0 siblings, 1 reply; 10+ messages in thread
From: Eric Botcazou @ 2020-01-28 9:31 UTC (permalink / raw)
To: Joel Hutton; +Cc: Vladimir Makarov, gcc-patches, nd
> Ping! Eric, do you have any objections to reverting?
See my comment posted in the audit trail of the TN on 01/20...
--
Eric Botcazou
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Ping][GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-28 9:31 ` Eric Botcazou
@ 2020-01-28 10:01 ` Joel Hutton
2020-01-28 15:34 ` Vladimir Makarov
0 siblings, 1 reply; 10+ messages in thread
From: Joel Hutton @ 2020-01-28 10:01 UTC (permalink / raw)
To: Vladimir Makarov; +Cc: Eric Botcazou, gcc-patches, nd
[-- Attachment #1: Type: text/plain, Size: 664 bytes --]
On 28/01/2020 09:07, Eric Botcazou wrote:
>> Ping! Eric, do you have any objections to reverting?
>
> See my comment posted in the audit trail of the TN on 01/20...
> Probably missing live range splitting or somesuch, as envisioned by
> Vladimir in its approval message. Feel free to eventually revert it.
Great. Vladimir, Ok for trunk?
Changelog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* ira.c (ira): Revert use of simplified LRA algorithm.
gcc/testsuite/ChangeLog:
2020-01-21 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* gcc.target/aarch64/pr93221.c: New test.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch --]
[-- Type: text/x-patch; name="0001-IRA-Fix-bug-93221-by-reverting-11b8091fb.patch", Size: 3145 bytes --]
From 1a2980ef6eeb76dbf0556f806a85a4f49ad3ebdd Mon Sep 17 00:00:00 2001
From: Joel Hutton <Joel.Hutton@arm.com>
Date: Tue, 21 Jan 2020 09:37:48 +0000
Subject: [PATCH] [IRA] Fix bug 93221 by reverting 11b8091fb
11b8091fb introduced a simplified LRA algorithm for -O0 that turned off
hard register splitting, this causes a problem for parameters passed in
multiple registers on aarch64. This fixes bug 93221.
---
gcc/ira.c | 38 +++++++++-------------
gcc/testsuite/gcc.target/aarch64/pr93221.c | 10 ++++++
2 files changed, 25 insertions(+), 23 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr93221.c
diff --git a/gcc/ira.c b/gcc/ira.c
index 46091adf8109263c72343dccfe4913857b5c74ae..c8b5f869da121506f0414901271eae9810689316 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -5205,35 +5205,27 @@ ira (FILE *f)
/* Perform target specific PIC register initialization. */
targetm.init_pic_reg ();
- if (optimize)
- {
- ira_conflicts_p = true;
-
- /* Determine the number of pseudos actually requiring coloring. */
- unsigned int num_used_regs = 0;
- for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
- if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
- num_used_regs++;
-
- /* If there are too many pseudos and/or basic blocks (e.g. 10K
- pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
- use simplified and faster algorithms in LRA. */
- lra_simple_p
- = ira_use_lra_p
- && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
- }
- else
- {
- ira_conflicts_p = false;
- lra_simple_p = ira_use_lra_p;
- }
+ ira_conflicts_p = optimize > 0;
+
+ /* Determine the number of pseudos actually requiring coloring. */
+ unsigned int num_used_regs = 0;
+ for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
+ if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
+ num_used_regs++;
+
+ /* If there are too many pseudos and/or basic blocks (e.g. 10K
+ pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
+ use simplified and faster algorithms in LRA. */
+ lra_simple_p
+ = ira_use_lra_p
+ && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
if (lra_simple_p)
{
/* It permits to skip live range splitting in LRA. */
flag_caller_saves = false;
/* There is no sense to do regional allocation when we use
- simplified LRA. */
+ simplified LRA. */
flag_ira_region = IRA_REGION_ONE;
ira_conflicts_p = false;
}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr93221.c b/gcc/testsuite/gcc.target/aarch64/pr93221.c
new file mode 100644
index 0000000000000000000000000000000000000000..4dc2c3d0149423dd3d666f7428277ffa9eb765c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93221.c
@@ -0,0 +1,10 @@
+/* PR target/93221 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mno-omit-leaf-frame-pointer" } */
+
+struct S { __Int32x4_t b[2]; };
+
+void
+foo (struct S x)
+{
+}
--
2.17.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Ping][GCC][IRA] Revert 11b8091fb to fix Bug 93221
2020-01-28 10:01 ` Joel Hutton
@ 2020-01-28 15:34 ` Vladimir Makarov
0 siblings, 0 replies; 10+ messages in thread
From: Vladimir Makarov @ 2020-01-28 15:34 UTC (permalink / raw)
To: Joel Hutton; +Cc: Eric Botcazou, gcc-patches, nd
On 1/28/20 4:30 AM, Joel Hutton wrote:
> On 28/01/2020 09:07, Eric Botcazou wrote:
>>> Ping! Eric, do you have any objections to reverting?
>> See my comment posted in the audit trail of the TN on 01/20...
>> Probably missing live range splitting or somesuch, as envisioned by
>> Vladimir in its approval message. Feel free to eventually revert it.
> Great. Vladimir, Ok for trunk?
>
Yes. Thank you.
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-01-28 15:28 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-21 18:35 [GCC][IRA] Revert 11b8091fb to fix Bug 93221 Joel Hutton
2020-01-21 19:27 ` Vladimir Makarov
2020-01-27 15:54 ` [Ping][GCC][IRA] " Joel Hutton
2020-01-28 9:31 ` Eric Botcazou
2020-01-28 10:01 ` Joel Hutton
2020-01-28 15:34 ` Vladimir Makarov
2020-01-21 20:04 ` [GCC][IRA] " Jakub Jelinek
2020-01-21 21:06 ` Joel Hutton
2020-01-21 21:36 ` Joel Hutton
2020-01-21 21:39 ` Joel Hutton
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