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* [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595]
@ 2020-09-07 16:13 Christophe Lyon
  2020-09-24 13:18 ` Christophe Lyon
       [not found] ` <DB7PR08MB300254D6AE1576689FA2A0FC93330@DB7PR08MB3002.eurprd08.prod.outlook.com>
  0 siblings, 2 replies; 4+ messages in thread
From: Christophe Lyon @ 2020-09-07 16:13 UTC (permalink / raw)
  To: gcc-patches

Since r204778 (g571880a0a4c512195aa7d41929ba6795190887b2), we favor
branches over IT blocks on Cortex-M. As a result, instead of
generating two nested IT blocks in thumb2-cond-cmp-[1234].c, we
generate either a single IT block, or use branches depending on
conditions tested by the program.

Since this was a deliberate change and the tests still pass as
expected on Cortex-A, this patch skips them when targetting
Cortex-M. The avoids the failures on Cortex M3, M4, and M33.  This
patch makes the testcases unsupported on Cortex-M7 although they pass
in this case because this CPU has different branch costs.

I tried to relax the scan-assembler directives using eg. cmpne|subne
or cmpgt|ble but that seemed fragile.

OK?

2020-09-07  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	PR target/94595
	* gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
	* gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
	* gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
	* gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
---
 gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +-
 gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +-
 gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +-
 gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
index 45ab605..36204f4 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
@@ -1,6 +1,6 @@
 /* Use conditional compare */
 /* { dg-options "-O2" } */
-/* { dg-skip-if "" { arm_thumb1_ok } } */
+/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
 /* { dg-final { scan-assembler "cmpne" } } */
 
 int f(int i, int j) 
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
index 17d9a8f..108d1c3 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
@@ -1,6 +1,6 @@
 /* Use conditional compare */                                                                                         
 /* { dg-options "-O2" } */
-/* { dg-skip-if "" { arm_thumb1_ok } } */
+/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
 /* { dg-final { scan-assembler "cmpeq" } } */
 
 int f(int i, int j) 
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
index 6b2a79b..ca7fd9f 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
@@ -1,6 +1,6 @@
 /* Use conditional compare */                                                                                         
 /* { dg-options "-O2" } */
-/* { dg-skip-if "" { arm_thumb1_ok } } */
+/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
 /* { dg-final { scan-assembler "cmpgt" } } */
 
 int f(int i, int j)
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
index 80e1076..91cc8f4 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
@@ -1,6 +1,6 @@
 /* Use conditional compare */                                                                                         
 /* { dg-options "-O2" } */
-/* { dg-skip-if "" { arm_thumb1_ok } } */
+/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
 /* { dg-final { scan-assembler "cmpgt" } } */
 
 int f(int i, int j)
-- 
2.7.4


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595]
  2020-09-07 16:13 [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595] Christophe Lyon
@ 2020-09-24 13:18 ` Christophe Lyon
  2020-09-30 13:54   ` Christophe Lyon
       [not found] ` <DB7PR08MB300254D6AE1576689FA2A0FC93330@DB7PR08MB3002.eurprd08.prod.outlook.com>
  1 sibling, 1 reply; 4+ messages in thread
From: Christophe Lyon @ 2020-09-24 13:18 UTC (permalink / raw)
  To: gcc Patches

Ping?

On Mon, 7 Sep 2020 at 18:13, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> Since r204778 (g571880a0a4c512195aa7d41929ba6795190887b2), we favor
> branches over IT blocks on Cortex-M. As a result, instead of
> generating two nested IT blocks in thumb2-cond-cmp-[1234].c, we
> generate either a single IT block, or use branches depending on
> conditions tested by the program.
>
> Since this was a deliberate change and the tests still pass as
> expected on Cortex-A, this patch skips them when targetting
> Cortex-M. The avoids the failures on Cortex M3, M4, and M33.  This
> patch makes the testcases unsupported on Cortex-M7 although they pass
> in this case because this CPU has different branch costs.
>
> I tried to relax the scan-assembler directives using eg. cmpne|subne
> or cmpgt|ble but that seemed fragile.
>
> OK?
>
> 2020-09-07  Christophe Lyon  <christophe.lyon@linaro.org>
>
>         gcc/testsuite/
>         PR target/94595
>         * gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
>         * gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
>         * gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
>         * gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
> ---
>  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +-
>  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +-
>  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +-
>  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> index 45ab605..36204f4 100644
> --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> @@ -1,6 +1,6 @@
>  /* Use conditional compare */
>  /* { dg-options "-O2" } */
> -/* { dg-skip-if "" { arm_thumb1_ok } } */
> +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
>  /* { dg-final { scan-assembler "cmpne" } } */
>
>  int f(int i, int j)
> diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> index 17d9a8f..108d1c3 100644
> --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> @@ -1,6 +1,6 @@
>  /* Use conditional compare */
>  /* { dg-options "-O2" } */
> -/* { dg-skip-if "" { arm_thumb1_ok } } */
> +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
>  /* { dg-final { scan-assembler "cmpeq" } } */
>
>  int f(int i, int j)
> diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> index 6b2a79b..ca7fd9f 100644
> --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> @@ -1,6 +1,6 @@
>  /* Use conditional compare */
>  /* { dg-options "-O2" } */
> -/* { dg-skip-if "" { arm_thumb1_ok } } */
> +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
>  /* { dg-final { scan-assembler "cmpgt" } } */
>
>  int f(int i, int j)
> diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> index 80e1076..91cc8f4 100644
> --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> @@ -1,6 +1,6 @@
>  /* Use conditional compare */
>  /* { dg-options "-O2" } */
> -/* { dg-skip-if "" { arm_thumb1_ok } } */
> +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
>  /* { dg-final { scan-assembler "cmpgt" } } */
>
>  int f(int i, int j)
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595]
  2020-09-24 13:18 ` Christophe Lyon
@ 2020-09-30 13:54   ` Christophe Lyon
  0 siblings, 0 replies; 4+ messages in thread
From: Christophe Lyon @ 2020-09-30 13:54 UTC (permalink / raw)
  To: gcc Patches

Ping?

On Thu, 24 Sep 2020 at 15:18, Christophe Lyon
<christophe.lyon@linaro.org> wrote:
>
> Ping?
>
> On Mon, 7 Sep 2020 at 18:13, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> >
> > Since r204778 (g571880a0a4c512195aa7d41929ba6795190887b2), we favor
> > branches over IT blocks on Cortex-M. As a result, instead of
> > generating two nested IT blocks in thumb2-cond-cmp-[1234].c, we
> > generate either a single IT block, or use branches depending on
> > conditions tested by the program.
> >
> > Since this was a deliberate change and the tests still pass as
> > expected on Cortex-A, this patch skips them when targetting
> > Cortex-M. The avoids the failures on Cortex M3, M4, and M33.  This
> > patch makes the testcases unsupported on Cortex-M7 although they pass
> > in this case because this CPU has different branch costs.
> >
> > I tried to relax the scan-assembler directives using eg. cmpne|subne
> > or cmpgt|ble but that seemed fragile.
> >
> > OK?
> >
> > 2020-09-07  Christophe Lyon  <christophe.lyon@linaro.org>
> >
> >         gcc/testsuite/
> >         PR target/94595
> >         * gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
> >         * gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
> >         * gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
> >         * gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
> > ---
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +-
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +-
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +-
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +-
> >  4 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > index 45ab605..36204f4 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpne" } } */
> >
> >  int f(int i, int j)
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > index 17d9a8f..108d1c3 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpeq" } } */
> >
> >  int f(int i, int j)
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > index 6b2a79b..ca7fd9f 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpgt" } } */
> >
> >  int f(int i, int j)
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > index 80e1076..91cc8f4 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpgt" } } */
> >
> >  int f(int i, int j)
> > --
> > 2.7.4
> >

^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595]
       [not found] ` <DB7PR08MB300254D6AE1576689FA2A0FC93330@DB7PR08MB3002.eurprd08.prod.outlook.com>
@ 2020-09-30 14:02   ` Kyrylo Tkachov
  0 siblings, 0 replies; 4+ messages in thread
From: Kyrylo Tkachov @ 2020-09-30 14:02 UTC (permalink / raw)
  To: Christophe Lyon; +Cc: gcc-patches

Now adding gcc-patches too

> -----Original Message-----
> From: Kyrylo Tkachov
> Sent: 30 September 2020 15:02
> To: Christophe Lyon <christophe.lyon@linaro.org>
> Subject: RE: [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on
> Cortex-M [PR94595]
> 
> Hi Christophe,
> 
> > -----Original Message-----
> > From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of
> > Christophe Lyon via Gcc-patches
> > Sent: 07 September 2020 17:13
> > To: gcc-patches@gcc.gnu.org
> > Subject: [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on
> Cortex-
> > M [PR94595]
> >
> > Since r204778 (g571880a0a4c512195aa7d41929ba6795190887b2), we
> favor
> > branches over IT blocks on Cortex-M. As a result, instead of
> > generating two nested IT blocks in thumb2-cond-cmp-[1234].c, we
> > generate either a single IT block, or use branches depending on
> > conditions tested by the program.
> >
> > Since this was a deliberate change and the tests still pass as
> > expected on Cortex-A, this patch skips them when targetting
> > Cortex-M. The avoids the failures on Cortex M3, M4, and M33.  This
> > patch makes the testcases unsupported on Cortex-M7 although they pass
> > in this case because this CPU has different branch costs.
> >
> > I tried to relax the scan-assembler directives using eg. cmpne|subne
> > or cmpgt|ble but that seemed fragile.
> >
> > OK?
> 
> Ok. Sorry for the delay, it fell through my filters.
> 
> Thanks,
> Kyrill
> 
> >
> > 2020-09-07  Christophe Lyon  <christophe.lyon@linaro.org>
> >
> > 	gcc/testsuite/
> > 	PR target/94595
> > 	* gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
> > 	* gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
> > 	* gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
> > 	* gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
> > ---
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +-
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +-
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +-
> >  gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +-
> >  4 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > index 45ab605..36204f4 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpne" } } */
> >
> >  int f(int i, int j)
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > index 17d9a8f..108d1c3 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpeq" } } */
> >
> >  int f(int i, int j)
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > index 6b2a79b..ca7fd9f 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpgt" } } */
> >
> >  int f(int i, int j)
> > diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > index 80e1076..91cc8f4 100644
> > --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c
> > @@ -1,6 +1,6 @@
> >  /* Use conditional compare */
> >  /* { dg-options "-O2" } */
> > -/* { dg-skip-if "" { arm_thumb1_ok } } */
> > +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */
> >  /* { dg-final { scan-assembler "cmpgt" } } */
> >
> >  int f(int i, int j)
> > --
> > 2.7.4


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-09-30 14:02 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-07 16:13 [PATCH 1/1] arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595] Christophe Lyon
2020-09-24 13:18 ` Christophe Lyon
2020-09-30 13:54   ` Christophe Lyon
     [not found] ` <DB7PR08MB300254D6AE1576689FA2A0FC93330@DB7PR08MB3002.eurprd08.prod.outlook.com>
2020-09-30 14:02   ` Kyrylo Tkachov

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