From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by sourceware.org (Postfix) with ESMTPS id 668AF38515D8 for ; Fri, 30 Apr 2021 14:09:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 668AF38515D8 Received: by mail-wr1-x432.google.com with SMTP id t18so13158590wry.1 for ; Fri, 30 Apr 2021 07:09:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=Y/MgVb0l0J3/7GUM6wyjkrKiaek4HwtWOThETSyi+GM=; b=Q47/TR2ZeXcUlJMIhnAmFnA88B3O5p+CV+A8p+i3oFFnoFzWjhiFgZsoBMmgpGWDCF lDA9IvqsGpd+sjj3/vuw8ZG9Nzt7FfzF3+dmDoOtxIR/Mqc9fa4vENzZ7S6rEMjNobzc PxTFTht3dpCp9cnlOs0G84IM64WBx6cXZMR8YgxViO6ud65SqYznCjWSRnVKT2kmq9ty gcCf/soAiw184RX6X+unbSrMtcElifSKXmMCX7SuIt/D9FERyBzrwtcbHR+84NSeDfTc 4+45t9fGTYlZg7awnr91ndbV9aDmrweWd2nxRWWkkIcmq7KNpo7bRAV5Mr8CiHHoGiPq WWMw== X-Gm-Message-State: AOAM530Vp6wpNume+ul0zpmcezdG4lkENsnPwC3taeMDI3HYI5Fe+gwx Pvs4tqISFMqbrDdrqV7Q2oqUwfvVPqnnuHe/ X-Google-Smtp-Source: ABdhPJyWYFKA4NiajUcv6GZOSTVEfsK7OpqqWShxBeRHigHlVIiPkbYKg7qFv8n+Yc6wg5NLYOYhTw== X-Received: by 2002:adf:d1c3:: with SMTP id b3mr7099184wrd.367.1619791791953; Fri, 30 Apr 2021 07:09:51 -0700 (PDT) Received: from localhost.localdomain (static.42.136.251.148.clients.your-server.de. [148.251.136.42]) by smtp.gmail.com with ESMTPSA id o9sm2345756wmh.19.2021.04.30.07.09.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Apr 2021 07:09:51 -0700 (PDT) From: Christophe Lyon To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/9] arm: MVE: Cleanup vcmpne/vcmpeq builtins Date: Fri, 30 Apr 2021 14:09:43 +0000 Message-Id: <1619791790-628-2-git-send-email-christophe.lyon@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1619791790-628-1-git-send-email-christophe.lyon@linaro.org> References: <1619791790-628-1-git-send-email-christophe.lyon@linaro.org> X-Spam-Status: No, score=-14.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Apr 2021 14:09:55 -0000 After the previous patch, we no longer need to emit the unsigned variants of vcmpneq/vcmpeqq. This patch removes them as well as the corresponding iterator entries. 2021-03-01 Christophe Lyon gcc/ * config/arm/arm_mve_builtins.def (vcmpneq_u): Remove. (vcmpneq_n_u): Likewise. (vcmpeqq_u,): Likewise. (vcmpeqq_n_u): Likewise. * config/arm/iterators.md (supf): Remove VCMPNEQ_U, VCMPEQQ_U, VCMPEQQ_N_U and VCMPNEQ_N_U. * config/arm/mve.md (mve_vcmpneq): Remove iteration. (mve_vcmpeqq_n): Likewise. (mve_vcmpeqq): Likewise. (mve_vcmpneq_n): Likewise. arm_mve_builtins.def: Remove vcmpneq_u, vcmpneq_n_u, vcmpeqq_u, vcmpeqq_n_u. iterators.md: Update VCMPNEQ VCMPEQQ VCMPEQQ_N VCMPNEQ_N mve.md: Remove vcmpneq_s vcmpeqq_n_u vcmpeqq_u, vcmpneq_n_u, --- gcc/config/arm/arm_mve_builtins.def | 4 ---- gcc/config/arm/iterators.md | 15 +++++++-------- gcc/config/arm/mve.md | 16 ++++++++-------- 3 files changed, 15 insertions(+), 20 deletions(-) diff --git a/gcc/config/arm/arm_mve_builtins.def b/gcc/config/arm/arm_mve_builtins.def index 460f6ba..ee34fd1 100644 --- a/gcc/config/arm/arm_mve_builtins.def +++ b/gcc/config/arm/arm_mve_builtins.def @@ -90,7 +90,6 @@ VAR3 (BINOP_NONE_NONE_IMM, vshrq_n_s, v16qi, v8hi, v4si) VAR1 (BINOP_NONE_NONE_UNONE, vaddlvq_p_s, v4si) VAR1 (BINOP_UNONE_UNONE_UNONE, vaddlvq_p_u, v4si) VAR3 (BINOP_UNONE_NONE_NONE, vcmpneq_s, v16qi, v8hi, v4si) -VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpneq_u, v16qi, v8hi, v4si) VAR3 (BINOP_NONE_NONE_NONE, vshlq_s, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_NONE, vshlq_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vsubq_u, v16qi, v8hi, v4si) @@ -118,11 +117,8 @@ VAR3 (BINOP_UNONE_UNONE_UNONE, vhsubq_n_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vhaddq_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vhaddq_n_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, veorq_u, v16qi, v8hi, v4si) -VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpneq_n_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vcmphiq_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vcmphiq_n_u, v16qi, v8hi, v4si) -VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpeqq_u, v16qi, v8hi, v4si) -VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpeqq_n_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpcsq_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vcmpcsq_n_u, v16qi, v8hi, v4si) VAR3 (BINOP_UNONE_UNONE_UNONE, vbicq_u, v16qi, v8hi, v4si) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 8fb723e..0aba93f 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -1279,13 +1279,12 @@ (define_int_attr supf [(VCVTQ_TO_F_S "s") (VCVTQ_TO_F_U "u") (VREV16Q_S "s") (VCREATEQ_U "u") (VCREATEQ_S "s") (VSHRQ_N_S "s") (VSHRQ_N_U "u") (VCVTQ_N_FROM_F_S "s") (VSHLQ_U "u") (VCVTQ_N_FROM_F_U "u") (VADDLVQ_P_S "s") (VSHLQ_S "s") - (VADDLVQ_P_U "u") (VCMPNEQ_U "u") (VCMPNEQ_S "s") + (VADDLVQ_P_U "u") (VCMPNEQ_S "s") (VABDQ_M_S "s") (VABDQ_M_U "u") (VABDQ_S "s") (VABDQ_U "u") (VADDQ_N_S "s") (VADDQ_N_U "u") (VADDVQ_P_S "s") (VADDVQ_P_U "u") (VBRSRQ_N_S "s") - (VBRSRQ_N_U "u") (VCMPEQQ_S "s") (VCMPEQQ_U "u") - (VCMPEQQ_N_S "s") (VCMPEQQ_N_U "u") (VCMPNEQ_N_S "s") - (VCMPNEQ_N_U "u") + (VBRSRQ_N_U "u") (VCMPEQQ_S "s") + (VCMPEQQ_N_S "s") (VCMPNEQ_N_S "s") (VHADDQ_N_S "s") (VHADDQ_N_U "u") (VHADDQ_S "s") (VHADDQ_U "u") (VHSUBQ_N_S "s") (VHSUBQ_N_U "u") (VHSUBQ_S "s") (VMAXQ_S "s") (VMAXQ_U "u") (VHSUBQ_U "u") @@ -1541,16 +1540,16 @@ (define_int_iterator VCREATEQ [VCREATEQ_U VCREATEQ_S]) (define_int_iterator VSHRQ_N [VSHRQ_N_S VSHRQ_N_U]) (define_int_iterator VCVTQ_N_FROM_F [VCVTQ_N_FROM_F_S VCVTQ_N_FROM_F_U]) (define_int_iterator VADDLVQ_P [VADDLVQ_P_S VADDLVQ_P_U]) -(define_int_iterator VCMPNEQ [VCMPNEQ_U VCMPNEQ_S]) +(define_int_iterator VCMPNEQ [VCMPNEQ_S]) (define_int_iterator VSHLQ [VSHLQ_S VSHLQ_U]) (define_int_iterator VABDQ [VABDQ_S VABDQ_U]) (define_int_iterator VADDQ_N [VADDQ_N_S VADDQ_N_U]) (define_int_iterator VADDVAQ [VADDVAQ_S VADDVAQ_U]) (define_int_iterator VADDVQ_P [VADDVQ_P_U VADDVQ_P_S]) (define_int_iterator VBRSRQ_N [VBRSRQ_N_U VBRSRQ_N_S]) -(define_int_iterator VCMPEQQ [VCMPEQQ_U VCMPEQQ_S]) -(define_int_iterator VCMPEQQ_N [VCMPEQQ_N_S VCMPEQQ_N_U]) -(define_int_iterator VCMPNEQ_N [VCMPNEQ_N_U VCMPNEQ_N_S]) +(define_int_iterator VCMPEQQ [VCMPEQQ_S]) +(define_int_iterator VCMPEQQ_N [VCMPEQQ_N_S]) +(define_int_iterator VCMPNEQ_N [VCMPNEQ_N_S]) (define_int_iterator VHADDQ [VHADDQ_S VHADDQ_U]) (define_int_iterator VHADDQ_N [VHADDQ_N_U VHADDQ_N_S]) (define_int_iterator VHSUBQ [VHSUBQ_S VHSUBQ_U]) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 7467d5f..b04c22b 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -836,9 +836,9 @@ (define_insn "mve_vaddlvq_p_v4si" (set_attr "length""8")]) ;; -;; [vcmpneq_u, vcmpneq_s]) +;; [vcmpneq_s]) ;; -(define_insn "mve_vcmpneq_" +(define_insn "mve_vcmpneq_s" [ (set (match_operand:HI 0 "vpr_register_operand" "=Up") (unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w") @@ -1035,9 +1035,9 @@ (define_insn "mve_vcmpcsq_u" ]) ;; -;; [vcmpeqq_n_s, vcmpeqq_n_u]) +;; [vcmpeqq_n_s]) ;; -(define_insn "mve_vcmpeqq_n_" +(define_insn "mve_vcmpeqq_n_s" [ (set (match_operand:HI 0 "vpr_register_operand" "=Up") (unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w") @@ -1050,9 +1050,9 @@ (define_insn "mve_vcmpeqq_n_" ]) ;; -;; [vcmpeqq_u, vcmpeqq_s]) +;; [vcmpeqq_s]) ;; -(define_insn "mve_vcmpeqq_" +(define_insn "mve_vcmpeqq_s" [ (set (match_operand:HI 0 "vpr_register_operand" "=Up") (unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w") @@ -1215,9 +1215,9 @@ (define_insn "mve_vcmpltq_s" ]) ;; -;; [vcmpneq_n_u, vcmpneq_n_s]) +;; [vcmpneq_n_s]) ;; -(define_insn "mve_vcmpneq_n_" +(define_insn "mve_vcmpneq_n_s" [ (set (match_operand:HI 0 "vpr_register_operand" "=Up") (unspec:HI [(match_operand:MVE_2 1 "s_register_operand" "w") -- 2.7.4