From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by sourceware.org (Postfix) with ESMTPS id 2BD3C38515D8 for ; Fri, 30 Apr 2021 14:09:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 2BD3C38515D8 Received: by mail-wm1-x32e.google.com with SMTP id s82so2886681wmf.3 for ; Fri, 30 Apr 2021 07:09:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=wz9Z2Q18CIGsQCwcbTUVVSeTl32uLEvyaywUOFu6x7M=; b=Gr4beW1kqNKcDeJs3K5BKNGBJ8YUUO+FX9fNPoqWjw64lsO+ba1+iebKNLLI3E0F7g JyErQGKRFGVZpqfuyBUrQIGXn9zg+bw0igGPAPUryrZ+6RQNaU0qYrHK9VMnRS1er6Gs 5+yWxJcRd0wsH58IpGHjpF6JSNTvTXq1pTNJLGTl+g9Qq6O9X7xJwhZ8GXi23aRz1zu3 AdNRnrCmOGZBxKGajcSwtEV2zb6Sa0apelMUbNHwNtqAsEaAn1T81bFv58tKfKXklhi5 1ryrCaqD3eDVyz5hZXRu6ARjigFNQkP8i5l9VOiRVg2gtyYBY7H9+FXiClsaoo/KVa3c 3npw== X-Gm-Message-State: AOAM531f34hfxV35lipmEpZuOZ5qardSZlTF9gOvMt5xQ4POq+9qBj2r doD434Hcy//WNAoGEHD5oSje7lqo76ueG2uh X-Google-Smtp-Source: ABdhPJySz+CeeCdKmqWKacpWIvq3Oga9cBTQUVgOv8J55ICwuOh4/yaN4+2BrwIquUCKDKqwYN8/tg== X-Received: by 2002:a1c:bcc3:: with SMTP id m186mr6353531wmf.99.1619791793780; Fri, 30 Apr 2021 07:09:53 -0700 (PDT) Received: from localhost.localdomain (static.42.136.251.148.clients.your-server.de. [148.251.136.42]) by smtp.gmail.com with ESMTPSA id o9sm2345756wmh.19.2021.04.30.07.09.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Apr 2021 07:09:53 -0700 (PDT) From: Christophe Lyon To: gcc-patches@gcc.gnu.org Subject: [PATCH 5/9] arm: MVE: Factorize vcmp_*f* Date: Fri, 30 Apr 2021 14:09:46 +0000 Message-Id: <1619791790-628-5-git-send-email-christophe.lyon@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1619791790-628-1-git-send-email-christophe.lyon@linaro.org> References: <1619791790-628-1-git-send-email-christophe.lyon@linaro.org> X-Spam-Status: No, score=-14.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Apr 2021 14:09:56 -0000 Like in the previous, we factorize the vcmp_*f* patterns to make maintenance easier. 2021-03-12 Christophe Lyon gcc/ * config/arm/iterators.md (MVE_FP_COMPARISONS): New. * config/arm/mve.md (mve_vcmpq_f) (mve_vcmpq_n_f): New, merge all vcmp_*f* patterns. (mve_vcmpeqq_f, mve_vcmpeqq_n_f, mve_vcmpgeq_f) (mve_vcmpgeq_n_f, mve_vcmpgtq_f) (mve_vcmpgtq_n_f, mve_vcmpleq_f) (mve_vcmpleq_n_f, mve_vcmpltq_f) (mve_vcmpltq_n_f, mve_vcmpneq_f) (mve_vcmpneq_n_f): Remove. * config/arm/unspecs.md (VCMPEQQ_F, VCMPEQQ_N_F, VCMPGEQ_F) (VCMPGEQ_N_F, VCMPGTQ_F, VCMPGTQ_N_F, VCMPLEQ_F, VCMPLEQ_N_F) (VCMPLTQ_F, VCMPLTQ_N_F, VCMPNEQ_F, VCMPNEQ_N_F): Remove. --- gcc/config/arm/iterators.md | 1 + gcc/config/arm/mve.md | 172 +++----------------------------------------- gcc/config/arm/unspecs.md | 12 ---- 3 files changed, 11 insertions(+), 174 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 29347f7..95df8bd 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -287,6 +287,7 @@ (define_code_iterator GTUGEU [gtu geu]) (define_code_iterator COMPARISONS [eq gt ge le lt]) ;; Comparisons for MVE (define_code_iterator MVE_COMPARISONS [eq ge geu gt gtu le lt ne]) +(define_code_iterator MVE_FP_COMPARISONS [eq ge gt le lt ne]) ;; A list of ... (define_code_iterator IOR_XOR [ior xor]) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 40baff7..7c846a4 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1926,182 +1926,30 @@ (define_insn "mve_vcaddq" ]) ;; -;; [vcmpeqq_f]) +;; [vcmpeqq_f, vcmpgeq_f, vcmpgtq_f, vcmpleq_f, vcmpltq_f, vcmpneq_f]) ;; -(define_insn "mve_vcmpeqq_f" +(define_insn "mve_vcmpq_f" [ (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand:MVE_0 2 "s_register_operand" "w")] - VCMPEQQ_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# eq, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpeqq_n_f]) -;; -(define_insn "mve_vcmpeqq_n_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r")] - VCMPEQQ_N_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# eq, %q1, %2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpgeq_f]) -;; -(define_insn "mve_vcmpgeq_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand:MVE_0 2 "s_register_operand" "w")] - VCMPGEQ_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# ge, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpgeq_n_f]) -;; -(define_insn "mve_vcmpgeq_n_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r")] - VCMPGEQ_N_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# ge, %q1, %2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpgtq_f]) -;; -(define_insn "mve_vcmpgtq_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand:MVE_0 2 "s_register_operand" "w")] - VCMPGTQ_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# gt, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpgtq_n_f]) -;; -(define_insn "mve_vcmpgtq_n_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r")] - VCMPGTQ_N_F)) + (MVE_FP_COMPARISONS:HI (match_operand:MVE_0 1 "s_register_operand" "w") + (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# gt, %q1, %2" + "vcmp.f%# , %q1, %q2" [(set_attr "type" "mve_move") ]) ;; -;; [vcmpleq_f]) +;; [vcmpeqq_n_f, vcmpgeq_n_f, vcmpgtq_n_f, vcmpleq_n_f, vcmpltq_n_f, vcmpneq_n_f]) ;; -(define_insn "mve_vcmpleq_f" +(define_insn "mve_vcmpq_n_f" [ (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand:MVE_0 2 "s_register_operand" "w")] - VCMPLEQ_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# le, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpleq_n_f]) -;; -(define_insn "mve_vcmpleq_n_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r")] - VCMPLEQ_N_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# le, %q1, %2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpltq_f]) -;; -(define_insn "mve_vcmpltq_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand:MVE_0 2 "s_register_operand" "w")] - VCMPLTQ_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# lt, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpltq_n_f]) -;; -(define_insn "mve_vcmpltq_n_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r")] - VCMPLTQ_N_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# lt, %q1, %2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpneq_f]) -;; -(define_insn "mve_vcmpneq_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand:MVE_0 2 "s_register_operand" "w")] - VCMPNEQ_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# ne, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vcmpneq_n_f]) -;; -(define_insn "mve_vcmpneq_n_f" - [ - (set (match_operand:HI 0 "vpr_register_operand" "=Up") - (unspec:HI [(match_operand:MVE_0 1 "s_register_operand" "w") - (match_operand: 2 "s_register_operand" "r")] - VCMPNEQ_N_F)) + (MVE_FP_COMPARISONS:HI (match_operand:MVE_0 1 "s_register_operand" "w") + (match_operand: 2 "s_register_operand" "r"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcmp.f%# ne, %q1, %2" + "vcmp.f%# , %q1, %2" [(set_attr "type" "mve_move") ]) diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md index 4d47ab7..07ca53b 100644 --- a/gcc/config/arm/unspecs.md +++ b/gcc/config/arm/unspecs.md @@ -710,18 +710,6 @@ (define_c_enum "unspec" [ VABDQ_M_U VABDQ_F VADDQ_N_F - VCMPEQQ_F - VCMPEQQ_N_F - VCMPGEQ_F - VCMPGEQ_N_F - VCMPGTQ_F - VCMPGTQ_N_F - VCMPLEQ_F - VCMPLEQ_N_F - VCMPLTQ_F - VCMPLTQ_N_F - VCMPNEQ_F - VCMPNEQ_N_F VMAXNMAQ_F VMAXNMAVQ_F VMAXNMQ_F -- 2.7.4