From: <apinski@marvell.com>
To: <gcc-patches@gcc.gnu.org>
Cc: Andrew Pinski <apinski@marvell.com>
Subject: [COMMITED] [RSIC-V] Fix 32bit riscv with zbs extension enabled
Date: Thu, 4 Aug 2022 19:42:07 -0700 [thread overview]
Message-ID: <1659667327-24452-1-git-send-email-apinski@marvell.com> (raw)
From: Andrew Pinski <apinski@marvell.com>
The problem here was a disconnect between splittable_const_int_operand
predicate and the function riscv_build_integer_1 for 32bits with zbs enabled.
The splittable_const_int_operand predicate had a check for TARGET_64BIT which
was not needed so this patch removed it.
Committed as obvious after a build for risc32-elf configured with --with-arch=rv32imac_zba_zbb_zbc_zbs.
Thanks,
Andrew Pinski
gcc/ChangeLog:
* config/riscv/predicates.md (splittable_const_int_operand):
Remove the check for TARGET_64BIT for single bit const values.
---
gcc/config/riscv/predicates.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 90db5dfcdd5..e98db2cb574 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -76,7 +76,7 @@ (define_predicate "splittable_const_int_operand"
/* Check whether the constant can be loaded in a single
instruction with zbs extensions. */
- if (TARGET_64BIT && TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op)))
+ if (TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op)))
return false;
/* Otherwise check whether the constant can be loaded in a single
--
2.27.0
reply other threads:[~2022-08-05 2:42 UTC|newest]
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