From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by sourceware.org (Postfix) with ESMTPS id EE2B33858C52 for ; Sat, 20 Aug 2022 17:14:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EE2B33858C52 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 27KFl5L4006946 for ; Sat, 20 Aug 2022 10:14:33 -0700 Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3j2x2x0rb0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 20 Aug 2022 10:14:33 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 20 Aug 2022 10:14:32 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 20 Aug 2022 10:14:32 -0700 Received: from linux.wrightpinski.org.com (unknown [10.69.242.198]) by maili.marvell.com (Postfix) with ESMTP id 084963F7065; Sat, 20 Aug 2022 10:14:31 -0700 (PDT) From: To: CC: Andrew Pinski Subject: [PATCH 1/3] Fix PR 106600: __builtin_bswap32 is not hooked up for ZBB for 32bit Date: Sat, 20 Aug 2022 10:14:24 -0700 Message-ID: <1661015666-14659-2-git-send-email-apinski@marvell.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1661015666-14659-1-git-send-email-apinski@marvell.com> References: <1661015666-14659-1-git-send-email-apinski@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: XsjRiwCE7rE50cHXVpcpu9MGGddryHYF X-Proofpoint-ORIG-GUID: XsjRiwCE7rE50cHXVpcpu9MGGddryHYF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-20_08,2022-08-18_01,2022-06-22_01 X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 20 Aug 2022 17:14:37 -0000 From: Andrew Pinski The problem here is the bswap2 pattern had a check for TARGET_64BIT but then used the X iterator. Since the X iterator is either SI or DI depending on the setting TARGET_64BIT, there is no reason for the TARGET_64BIT. OK? Built and tested on both riscv32-linux-gnu and riscv64-linux-gnu. Thanks, Andrew Pinski gcc/ChangeLog: PR target/106600 * config/riscv/bitmanip.md (bswap2): Remove condition on TARGET_64BIT as X is already conditional there. gcc/testsuite/ChangeLog: PR target/106600 * gcc.target/riscv/zbb_32_bswap-1.c: New test. * gcc.target/riscv/zbb_bswap-1.c: New test. Change-Id: Iba3187e5620b0f291f7c38aab597f367b47a22c5 --- gcc/config/riscv/bitmanip.md | 2 +- gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c | 11 +++++++++++ gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c | 11 +++++++++++ 3 files changed, 23 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index d1570ce8508..c7ba667f87a 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -272,7 +272,7 @@ (define_insn "rotlsi3_sext" (define_insn "bswap2" [(set (match_operand:X 0 "register_operand" "=r") (bswap:X (match_operand:X 1 "register_operand" "r")))] - "TARGET_64BIT && TARGET_ZBB" + "TARGET_ZBB" "rev8\t%0,%1" [(set_attr "type" "bitmanip")]) diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c new file mode 100644 index 00000000000..3ff7d9de409 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc_zbb -mabi=ilp32" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +int foo(int n) +{ + return __builtin_bswap32(n); +} + +/* { dg-final { scan-assembler "rev8" } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c new file mode 100644 index 00000000000..20feded0df2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zbb -mabi=lp64" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +int foo(int n) +{ + return __builtin_bswap32(n); +} + +/* { dg-final { scan-assembler "rev8" } } */ + -- 2.17.1