Hi Tom, following the first patch.

This new barrier implementation I posted in the first patch uses the 'bar.red' instruction.
Usually this could've been easily done with a single line of inline assembly. However I quickly
realized that because the NVPTX GCC port is implemented with all virtual general registers,
we don't have a register constraint usable to select "predicate registers".
Since bar.red uses predicate typed values, I can't create it directly using inline asm.

So it appears that the most simple way of accessing it is with a target builtin.
The attached patch adds bar.red instructions to the nvptx port, and __builtin_nvptx_bar_red_* builtins
to use it. The code should support all variations of bar.red (and, or, and popc operations).

(This support was used to implement the first libgomp barrier patch, so must be approved together)

Thanks,
Chung-Lin

2022-09-21  Chung-Lin Tang  <cltang@codesourcery.com>

gcc/ChangeLog:

	* config/nvptx/nvptx.cc (nvptx_print_operand): Add 'p'
	case, adjust comments.
	(enum nvptx_builtins): Add NVPTX_BUILTIN_BAR_RED_AND,
	NVPTX_BUILTIN_BAR_RED_OR, and NVPTX_BUILTIN_BAR_RED_POPC.
	(nvptx_expand_bar_red): New function.
	(nvptx_init_builtins):
	Add DEFs of __builtin_nvptx_bar_red_[and/or/popc].
	(nvptx_expand_builtin): Use nvptx_expand_bar_red to expand
	NVPTX_BUILTIN_BAR_RED_[AND/OR/POPC] cases.

	* config/nvptx/nvptx.md (define_c_enum "unspecv"): Add
	UNSPECV_BARRED_AND, UNSPECV_BARRED_OR, and UNSPECV_BARRED_POPC.
	(BARRED): New int iterator.
	(barred_op,barred_mode,barred_ptxtype): New int attrs.
	(nvptx_barred_<barred_op>): New define_insn.