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charset="us-ascii" Content-ID: <7EAB7D812805B8489D1C77EFDAE41DE3@namprd19.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Dell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DS7PR19MB4501.namprd19.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0b7ff860-c335-42c3-1ba0-08daae24577b X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Oct 2022 20:40:33.5150 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 945c199a-83a2-4e80-9f8c-5a91be5752dd X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: tBieCPd3zqVypYELbc4fMrlWSPPfK7KB0YkxdIgrDOYDwX4NL46lwtsZu6/AdEa83AdTdIcVRGyXtYnsSvwTFA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR19MB6916 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-14_10,2022-10-14_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 clxscore=1015 mlxscore=0 priorityscore=1501 mlxlogscore=995 bulkscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210140113 X-Proofpoint-ORIG-GUID: tTYpKqAFZY4SrQlYURRxFdct_YiywT-v X-Proofpoint-GUID: tTYpKqAFZY4SrQlYURRxFdct_YiywT-v X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 malwarescore=0 mlxscore=0 phishscore=0 adultscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210140113 X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > On Oct 14, 2022, at 4:12 PM, Segher Boessenkool wrote: >=20 > On Fri, Oct 14, 2022 at 07:58:39PM +0000, Koning, Paul wrote: >>> On Oct 14, 2022, at 2:03 PM, Jeff Law via Gcc-patches wrote: >>> On 10/14/22 11:35, Segher Boessenkool wrote: >>>> On Fri, Oct 14, 2022 at 11:07:43AM -0600, Jeff Law wrote: >>>>>> LRA only ever generates insns that pass recog. The backend allows t= his >>>>>> define_insn, requiring it to be split (it returns template "#"), but >>>>>> then somehow it doesn't match in any split pass? >>>>> Nope. The elimination code will just change one register without >>>>> re-recognizing. That's precisely what happens here. >>>> That is a big oversight then. Please file a PR? >>>=20 >>> Sure. But just recognizing (for this particular case) will just move t= he fault from a failure to split to a failure to recognize. From my wanderi= ngs in the elimination code, I don't see that it has a path that would allo= w it to reasonably handle this case -- ie, if the insn does not recognize, = what then? Conceptually we need to generate an input-reload but I don't s= ee a way to do that in the elimination code. Maybe Vlad knows how it ought= to be handled. >>=20 >> I probably have too simplistic a view of this, but the way I think of it= is that LRA (and reload) make decisions subject to constraints, and among = those constraints are the ones specified in the MD file patterns. That to = me means that a substitution proposed to be made by the LRA code is subject= to those invariants: it can't do that if the constraints say "no" and must= then consider some other alternative. >=20 > I think that is exactly right for LRA. >=20 > Old reload conceptually changed the whole function all at once, starting > with valid RTL, and ending with strictly valid RTL. LRA works locally, > one instruction at a time essentially, and makes the changes > immediately. If when it has finished work on the function offsets have > changed, it walks over the whole function again, repeat until done. >=20 > "Strictly valid" means that the constraints are considered, and the insn > is only valid if some enabled alternative satisfies all constraints. >=20 > I hope I got that all right, I'm not an expert! :-) Thanks Segher. As I said earlier, if for some reason this straightforward understanding is= not completely accurate, that can be handled provided it is documented whe= n and why the exceptions arise, and what methods the target author should u= se to deal with these things when they happen. As a target maintainer not deeply skilled in the GCC common internals, I te= nd to trip over these things. With the old reload, and secondary reload in= particular, it always felt to me like the answer was "keep tweaking the = target definition files until the test cases stop breaking". That isn't ho= w it should be. =20 Perhaps some of these issues come from out of the ordinary target restricti= ons. The autoinc/autodec case we're discussing may be an example of that. = The one I remember in particular was the pdp11 float instructions, where I= have 6 registers but only 4 of these can be loaded from or stored to memor= y. Putting the other two to work while having spill to memory work right t= ook quite a lot of iteration. It may be LRA is better in these areas. I haven't spent much time with tha= t, other than to create a way to enable its use and observing that (a) I go= t about the same test suite numbers either way and (b) the LRA code was not= as good in some of the cases. paul