From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Paul Hua <paul.hua.gm@gmail.com>, gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Matthew Fortune <mfortune@gmail.com>,
syq@debian.org, huangpei@loongson.cn,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
mattst88@gmail.com
Subject: Re: [MIPS] GCC: Fix Loongson3 LLSC Errata
Date: Mon, 30 Sep 2019 09:59:00 -0000 [thread overview]
Message-ID: <16ecb24e-1e08-ec2f-21ab-55197bf2294f@flygoat.com> (raw)
In-Reply-To: <CAKjxQHkGuM7V-e78-SyRypL8rYdQ2-mXLfYaK1au8x=LNnGgBA@mail.gmail.com>
On 2018/11/30 ä¸å8:45, Paul Hua wrote:
> In some older Loongson3 processors there is a LL/SC errata that can
> cause the CPU to deadlock occasionally. The details are very
> complicated. We find a way to work around this errata by a) adding a
> sync before ll/lld instruction, b) adding a sync
> before branch target that between ll and sc. The assembler do the jobs
> 'a', gcc do the jobs 'b'.
Hi all,
Any update about this patch?
As this workaround is the last barrier for generic MIPS distros to run
on Loongson systems.
Btw, I heard from Loongson guys that type A (adding a sync before ll/lld
instruction) of this errata only exist on pre-3A2000 (GS464) processors
while type B exist on all processors. Is that true?
If so, then they should have different naming in flags to prevent
confusing. I saw that you are using "LLTGT" and "LLSYNC" in cpucfg bit
domin of 3A4000, should we also use that naming in toolchain?
Thanks.
--
Jiaxun Yang
> This patch also add a configure options
> --with-mips-fix-loongson3-llsc=[yes|no] to enable fix-loongson3-llsc
> by config.
>
> >From 16f0fd9e32d2098637dc0eb3e576444c48c43f22 Mon Sep 17 00:00:00 2001
> From: Chenghua Xu <paul.hua.gm@gmail.com>
> Date: Fri, 30 Nov 2018 19:57:38 +0800
> Subject: [PATCH] [MIPS][GCC] Fix Loongson3 LLSC Errata.
>
> gcc/
> * config.gcc (supported_defaults): Add fix-loongson3-llsc
> (with_fix_loongson3_llsc): Add validation.
> (all_defaults): Add fix-loongson3-llsc.
> * config/mips/mips.c (mips_process_sync_loop): Add sync before
> branch target that between ll and sc.
> * config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
> fix-loongson3-llsc.
> gcc/config/mips/mips.opt: New option.
> * doc/install.texi (--with-fix-loongson3-llsc):Document the new
> option.
> * doc/invoke.texi (-mfix-loongson3-llsc):Document the new option.
>
> gcc/testsuite/
> * gcc.target/mips/fix-loongson3-llsc.c: New test.
> * gcc.target/mips/mips.exp (option): Add fix-loongson3-llsc.
> ---
> gcc/config.gcc | 19 +++++++++++++++++--
> gcc/config/mips/mips.c | 13 +++++++++++--
> gcc/config/mips/mips.h | 4 +++-
> gcc/config/mips/mips.opt | 4 ++++
> gcc/doc/install.texi | 4 ++++
> gcc/doc/invoke.texi | 8 ++++++++
> .../gcc.target/mips/fix-loongson3-llsc.c | 10 ++++++++++
> gcc/testsuite/gcc.target/mips/mips.exp | 1 +
> 8 files changed, 58 insertions(+), 5 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/mips/fix-loongson3-llsc.c
prev parent reply other threads:[~2019-09-30 9:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-30 12:46 [PATCH] " Paul Hua
2018-12-03 7:12 ` YunQiang Su
2019-09-30 9:59 ` Jiaxun Yang [this message]
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