From: Andrew Burgess <andrew.burgess@embecosm.com>
To: gcc-patches@gcc.gnu.org, gnu@amylaar.uk
Cc: noamca@mellanox.com, Claudiu.Zissulescu@synopsys.com,
Andrew Burgess <andrew.burgess@embecosm.com>
Subject: [PATCHv2 6/7] gcc/arc: Mask integer 'L' operands to 32-bit
Date: Thu, 21 Apr 2016 11:40:00 -0000 [thread overview]
Message-ID: <18b0f70e52c5132970c07d7b469909bbe57405f1.1461238348.git.andrew.burgess@embecosm.com> (raw)
In-Reply-To: <cover.1461238348.git.andrew.burgess@embecosm.com>
In-Reply-To: <cover.1461238348.git.andrew.burgess@embecosm.com>
When formatting 'L' operands (least significant word) only print
32-bits, don't sign extend to 64-bits.
This commit could really be applied directly to the current GCC trunk,
however, the only test I have for this issue right now relies on the
nps400 bitops support.
gcc/ChangeLog:
* config/arc/arc.c (arc_print_operand): Print integer 'L' operands
as 32-bits.
gcc/testsuite/ChangeLog:
* gcc.target/arc/movh_cl-1.c: New file.
---
gcc/ChangeLog.NPS400 | 6 ++++++
gcc/config/arc/arc.c | 10 ++++------
gcc/testsuite/ChangeLog.NPS400 | 4 ++++
gcc/testsuite/gcc.target/arc/movh_cl-1.c | 27 +++++++++++++++++++++++++++
4 files changed, 41 insertions(+), 6 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/arc/movh_cl-1.c
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 72a0825..b7b8516 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -3181,18 +3181,16 @@ arc_print_operand (FILE *file, rtx x, int code)
else if (GET_CODE (x) == CONST_INT
|| GET_CODE (x) == CONST_DOUBLE)
{
- rtx first, second;
+ rtx first, second, word;
split_double (x, &first, &second);
if((WORDS_BIG_ENDIAN) == 0)
- fprintf (file, "0x%08" PRIx64,
- code == 'L' ? INTVAL (first) : INTVAL (second));
+ word = (code == 'L' ? first : second);
else
- fprintf (file, "0x%08" PRIx64,
- code == 'L' ? INTVAL (second) : INTVAL (first));
-
+ word = (code == 'L' ? second : first);
+ fprintf (file, "0x%08" PRIx32, ((uint32_t) INTVAL (word)));
}
else
output_operand_lossage ("invalid operand to %%H/%%L code");
diff --git a/gcc/testsuite/gcc.target/arc/movh_cl-1.c b/gcc/testsuite/gcc.target/arc/movh_cl-1.c
new file mode 100644
index 0000000..220cd9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/movh_cl-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
+
+struct thing
+{
+ union
+ {
+ int raw;
+ struct
+ {
+ unsigned a : 1;
+ unsigned b : 1;
+ };
+ };
+};
+
+extern void func (int);
+
+void
+blah ()
+{
+ struct thing xx;
+ xx.a = xx.b = 1;
+ func (xx.raw);
+}
+
+/* { dg-final { scan-assembler "movh\.cl r\[0-9\]+,0xc0000000>>16" } } */
--
2.6.4
next prev parent reply other threads:[~2016-04-21 11:40 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-04 13:25 [PATCH 00/10] ARC: Add support for NPS400 variant Andrew Burgess
2016-03-04 13:25 ` [PATCH 01/10] gcc: Add support for mellanox nps400 arc variant Andrew Burgess
2016-03-04 13:26 ` [PATCH 10/10] gcc/arc: Add __NPS400__ define for nps400 targets Andrew Burgess
2016-03-04 13:26 ` [PATCH 07/10] gcc/arc: Add nps400 bitops support Andrew Burgess
2016-03-04 13:26 ` [PATCH 02/10] gcc/arc: Add -munaligned-access option for nps400 Andrew Burgess
2016-03-04 13:26 ` [PATCH 06/10] gcc/arc: Add support for nps400 cmem xld/xst instructions Andrew Burgess
2016-03-04 13:26 ` [PATCH 05/10] gcc/arc: convert some constraints to define_constraint Andrew Burgess
2016-03-04 13:26 ` [PATCH 08/10] gcc/arc: Mask integer 'L' operands to 32-bit Andrew Burgess
2016-03-04 13:26 ` [PATCH 03/10] gcc/arc: generate jump tables in code section for nps400 Andrew Burgess
2016-03-04 13:26 ` [PATCH 09/10] gcc/arc: Add an nps400 specific testcase Andrew Burgess
2016-03-04 13:26 ` [PATCH 04/10] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns Andrew Burgess
2016-04-21 11:39 ` [PATCHv2 2/7] " Andrew Burgess
2016-04-28 17:07 ` Joern Wolfgang Rennecke
2016-04-29 11:59 ` Andrew Burgess
2016-04-29 12:09 ` Joern Wolfgang Rennecke
2016-04-21 11:39 ` [PATCHv2 0/7] ARC: Add support for nps400 variant Andrew Burgess
2016-04-28 15:31 ` Joern Wolfgang Rennecke
2016-04-28 16:55 ` Joern Wolfgang Rennecke
2016-04-29 9:04 ` Claudiu Zissulescu
2016-04-29 10:22 ` Andrew Burgess
2016-04-29 22:17 ` Andrew Burgess
2016-05-02 9:02 ` Claudiu Zissulescu
2016-05-03 10:56 ` Andrew Burgess
2016-05-12 11:30 ` Claudiu Zissulescu
2016-06-14 18:46 ` Joern Wolfgang Rennecke
2016-06-14 23:38 ` [PATCH 0/2] Arc fixes and genrecog warning fix Andrew Burgess
2016-06-14 23:38 ` [PATCH 2/2] gcc/genrecog: Don't warn for missing mode on special predicates Andrew Burgess
2016-06-15 18:08 ` Richard Sandiford
2016-06-30 13:38 ` Andrew Burgess
2016-07-04 8:47 ` Richard Sandiford
2016-07-06 19:43 ` Andrew Burgess
2016-07-13 22:19 ` Jeff Law
2016-06-14 23:38 ` [PATCH 1/2] gcc/arc: New peephole2 and little endian arc test fixes Andrew Burgess
2016-11-16 11:44 ` [PATCHv2 0/7] ARC: Add support for nps400 variant Claudiu Zissulescu
2016-04-21 11:39 ` [PATCHv2 3/7] gcc/arc: convert some constraints to define_constraint Andrew Burgess
2016-04-28 17:16 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 4/7] gcc/arc: Add support for nps400 cmem xld/xst instructions Andrew Burgess
2016-04-28 18:23 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 1/7] gcc/arc: Add support for nps400 cpu type Andrew Burgess
2016-04-28 17:07 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` Andrew Burgess [this message]
2016-04-28 19:09 ` [PATCHv2 6/7] gcc/arc: Mask integer 'L' operands to 32-bit Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 5/7] gcc/arc: Add nps400 bitops support Andrew Burgess
2016-04-28 18:50 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 7/7] gcc/arc: Add an nps400 specific testcase Andrew Burgess
2016-04-28 19:14 ` Joern Wolfgang Rennecke
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