From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 77178 invoked by alias); 8 May 2017 14:33:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 77158 invoked by uid 89); 8 May 2017 14:33:54 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=usa, adr X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 08 May 2017 14:33:53 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0F8081516; Mon, 8 May 2017 07:33:54 -0700 (PDT) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6B7943F4FF; Mon, 8 May 2017 07:33:53 -0700 (PDT) Subject: Re: [AArch64] Tighten move constraints for symbolic operands To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com References: <87wpb5alq1.fsf@e105548-lin.cambridge.arm.com> From: "Richard Earnshaw (lists)" Message-ID: <19af180a-618a-5078-91c5-fc01a6cd4046@arm.com> Date: Mon, 08 May 2017 14:37:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <87wpb5alq1.fsf@e105548-lin.cambridge.arm.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2017-05/txt/msg00548.txt.bz2 On 31/03/17 09:34, Richard Sandiford wrote: > The movsi and movdi constraints allowed the source to be any > absolute symbolic expression ("S"). That's OK for operands that > have already been vetted by the aarch64_mov_operand predicate but > causes problems if the register allocator substitutes an equivalence > (the usual "the constraints can't accept more than the predicates" > restriction). > > Although all other uses of "S" in the backend are redundant and could > in principle be removed, "S" itself is a publicly-documented constraint > and so we'd have to keep its definition. This patch therefore adds a > new "Usa" constraint for legitimate absolute address operands. > > I saw this for a large testcase in which an equivalence was used > for a label_ref jump table. It's not something that can be cut > down easily or that would give a robust regression test. > > I don't think this is a regression, so maybe we don't want it for GCC 7. > > Tested on aarch64-linux-gnu. OK to install? > OK. R. > Thanks, > Richard > > > gcc/ > * config/aarch64/constraints.md (Usa): New constraint. > * config/aarch64/aarch64.md (*movsi_aarch64, *movdi_aarch64): Use it. > > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md > index 3717edf..260bd64 100644 > --- a/gcc/config/aarch64/aarch64.md > +++ b/gcc/config/aarch64/aarch64.md > @@ -1074,7 +1074,7 @@ > > (define_insn_and_split "*movsi_aarch64" > [(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r ,r,*w,m, m,r,r ,*w, r,*w") > - (match_operand:SI 1 "aarch64_mov_operand" " r,r,k,M,n,Dv,m, m,rZ,*w,S,Ush,rZ,*w,*w"))] > + (match_operand:SI 1 "aarch64_mov_operand" " r,r,k,M,n,Dv,m, m,rZ,*w,Usa,Ush,rZ,*w,*w"))] > "(register_operand (operands[0], SImode) > || aarch64_reg_or_zero (operands[1], SImode))" > "@ > @@ -1108,7 +1108,7 @@ > > (define_insn_and_split "*movdi_aarch64" > [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r ,r,*w,m, m,r,r, *w, r,*w,w") > - (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,n,Dv,m, m,rZ,*w,S,Ush,rZ,*w,*w,Dd"))] > + (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,n,Dv,m, m,rZ,*w,Usa,Ush,rZ,*w,*w,Dd"))] > "(register_operand (operands[0], DImode) > || aarch64_reg_or_zero (operands[1], DImode))" > "@ > diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md > index b77e096..5852a42 100644 > --- a/gcc/config/aarch64/constraints.md > +++ b/gcc/config/aarch64/constraints.md > @@ -104,6 +104,14 @@ > (and (match_code "high") > (match_test "aarch64_valid_symref (XEXP (op, 0), GET_MODE (XEXP (op, 0)))"))) > > +(define_constraint "Usa" > + "@internal > + A constraint that matches an absolute symbolic address that can be > + loaded by a single ADR." > + (and (match_code "const,symbol_ref,label_ref") > + (match_test "aarch64_symbolic_address_p (op)") > + (match_test "aarch64_mov_operand_p (op, GET_MODE (op))"))) > + > (define_constraint "Uss" > "@internal > A constraint that matches an immediate shift constant in SImode." >