From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from xry111.site (xry111.site [IPv6:2001:470:683e::1]) by sourceware.org (Postfix) with ESMTPS id 99E813858425 for ; Sat, 12 Nov 2022 07:08:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 99E813858425 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=xry111.site Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xry111.site DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1668236895; bh=oNVlqFmmXaOvtYl5UiW8L6TXKZ4TsyjegizFPC2DCeU=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=TR5Sdqb5VUtEZ/EC2uNXG7Ul5QLrH1huMD8i9t8boQRFOrH43PuhnS5lyL7x6NHv5 gNqZ68pxEqT14+vGY/3pYEG/XeuRpOYd1Xc7sfHQ04OW6fUmSC/Np7Bq5WRqZDd9Cx SRJofRkyDnaI3bersB2gZTOKzDADlSxHj9uztVEQ= Received: from localhost.localdomain (xry111.site [IPv6:2001:470:683e::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-384)) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id E06266591F; Sat, 12 Nov 2022 02:08:13 -0500 (EST) Message-ID: <1a465d2a0bea2a47aadaa727c0689ac48d5982c5.camel@xry111.site> Subject: Re: [PATCH v2 0/4] LoongArch: Add some floating-point operations From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang Date: Sat, 12 Nov 2022 15:08:12 +0800 In-Reply-To: <20221109135329.952128-1-xry111@xry111.site> References: <20221109135329.952128-1-xry111@xry111.site> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.0 MIME-Version: 1.0 X-Spam-Status: No, score=0.7 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FROM_SUSPICIOUS_NTLD,KAM_SHORT,LIKELY_SPAM_FROM,PDS_OTHER_BAD_TLD,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, 2022-11-09 at 21:53 +0800, Xi Ruoyao wrote: > These patches allow to expand the following builtins to floating point > instructions for LoongArch: >=20 > - __builtin_rint{,f} > - __builtin_{l,ll}rint{,f} > - __builtin_{l,ll}floor{,f} > - __builtin_{l,ll}ceil{,f} > - __builtin_scalb{n,ln}{,f} > - __builtin_logb{,f} >=20 > Bootstrapped and regtested on loongarch64-linux-gnu.=C2=A0 And a modified > Glibc using the builtins for rint{,f}, {l,ll}rint{,f}, and logb{,f} > also survived Glibc test suite. >=20 > Please review ASAP because GCC 13 stage 1 will end on Nov. 13th. >=20 > v1 -> v2: Only use ftint{rm,rp} instructions if floor and ceil are > allowed to raise inexact exception. >=20 > Xi Ruoyao (4): > =C2=A0 LoongArch: Rename frint_ to rint2 > =C2=A0 LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions > =C2=A0 LoongArch: Add fscaleb.{s,d} instructions as ldexp{sf,df}3 > =C2=A0 LoongArch: Add flogb.{s,d} instructions and expand logb{sf,df}2 >=20 > =C2=A0gcc/config/loongarch/loongarch.md=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 95 > ++++++++++++++++++- > =C2=A0gcc/testsuite/gcc.target/loongarch/flogb.c=C2=A0=C2=A0=C2=A0 | 18 += +++ > =C2=A0gcc/testsuite/gcc.target/loongarch/frint.c=C2=A0=C2=A0=C2=A0 | 16 += +++ > =C2=A0gcc/testsuite/gcc.target/loongarch/fscaleb.c=C2=A0 | 48 ++++++++++ > =C2=A0.../gcc.target/loongarch/ftint-no-inexact.c=C2=A0=C2=A0 | 44 ++++++= +++ > =C2=A0gcc/testsuite/gcc.target/loongarch/ftint.c=C2=A0=C2=A0=C2=A0 | 44 += ++++++++ > =C2=A06 files changed, 261 insertions(+), 4 deletions(-) > =C2=A0create mode 100644 gcc/testsuite/gcc.target/loongarch/flogb.c > =C2=A0create mode 100644 gcc/testsuite/gcc.target/loongarch/frint.c > =C2=A0create mode 100644 gcc/testsuite/gcc.target/loongarch/fscaleb.c > =C2=A0create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint-no- > inexact.c > =C2=A0create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint.c >=20 Pushed r13-3922. I'll be busy in the following week. Will do the work on Glibc side after Nov. 20. --=20 Xi Ruoyao School of Aerospace Science and Technology, Xidian University