Hi all,

This patch implements the ACLE intrinsics to access the 
FRINT[32,64][Z,X] scalar[1] and vector[2][3] instructions
from Armv8.5-a. These are enabled when the __ARM_FEATURE_FRINT macro is 
defined.

They're added in a fairly standard way through builtins and unspecs at 
the RTL level.
The scalar intrinsics

Bootstrapped and tested on aarch64-none-linux-gnu.

Ok for trunk?
Thanks,
Kyrill

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics
[2] 
https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?page=2&search=vrnd32
[3] 
https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?page=2&search=vrnd64

2019-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/aarch64/aarch64.md ("unspec"): Add UNSPEC_FRINT32Z,
     UNSPEC_FRINT32X, UNSPEC_FRINT64Z, UNSPEC_FRINT64X.
     (aarch64_<frintnzs_op><mode>): New define_insn.
     * config/aarch64/aarch64.h (TARGET_FRINT): Define.
     * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
     __ARM_FEATURE_FRINT when appropriate.
     * config/aarch64/aarch64-simd-builtins.def: Add builtins for frint32z,
     frint32x, frint64z, frint64x.
     * config/aarch64/arm_acle.h (__rint32zf, __rint32z, __rint64zf,
     __rint64z, __rint32xf, __rint32x, __rint64xf, __rint64x): Define.
     * config/aarch64/arm_neon.h (vrnd32z_f32, vrnd32zq_f32, vrnd32z_f64,
     vrnd32zq_f64, vrnd32x_f32, vrnd32xq_f32, vrnd32x_f64, vrnd32xq_f64,
     vrnd64z_f32, vrnd64zq_f32, vrnd64z_f64, vrnd64zq_f64, vrnd64x_f32,
     vrnd64xq_f32, vrnd64x_f64, vrnd64xq_f64): Define.
     * config/aarch64/iterators.md (VSFDF): Define.
     (FRINTNZX): Likewise.
     (frintnzs_op): Likewise.

2019-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * gcc.target/aarch64/acle/rintnzx_1.c: New test.
     * gcc.target/aarch64/simd/vrndnzx_1.c: Likewise.