Re: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT

[John David Anglin <dave.anglin@bell.net>]

Committed.

Regards,
Dave

On 2020-08-22 7:24 p.m., Roger Sayle wrote:
> Hi Dave,
> I actually think using plus_xor_ior operator is useful.  It means that if combine,
> inlining or some other RTL simplification generates these variants, these forms
> will still be recognized by the backend.  It's more typing, but the compiler produces
> better code.
>
> Here's what I have so far, but please feel free to modify anything.  I'll leave the
> rest to you.
>
> With this patch:
>
> unsigned long long rotl4(unsigned long long x)
> {
>   return (x<<4) | (x>>60);
> }
>
> unsigned long long rotr4(unsigned long long x)
> {
>   return (x<<60) | (x>>4);
> }
>
> which previously generated:
>
> rotl4:	depd,z %r26,59,60,%r28
> 	extrd,u %r26,3,4,%r26
> 	bve (%r2)
> 	or %r26,%r28,%r28
>
> rotr4:	extrd,u %r26,59,60,%r28
> 	depd,z %r26,3,4,%r26
> 	bve (%r2)
> 	or %r26,%r28,%r28
>
> now produces:
>
> rotl4:	bve (%r2)
> 	shrpd %r26,%r26,60,%r28
>
> rotr4:	bve (%r2)
> 	shrpd %r26,%r26,4,%r28
>
>
> I'm guessing this is very similar to what you were thinking (or what I described previously).
>
> Many thanks again for trying out these patches/suggestions for me.
>
> Best regards,
> Roger
> --
>
> -----Original Message-----
> From: John David Anglin <dave.anglin@bell.net> 
> Sent: 22 August 2020 23:09
> To: Roger Sayle <roger@nextmovesoftware.com>; 'GCC Patches' <gcc-patches@gcc.gnu.org>
> Cc: 'Jeff Law' <law@redhat.com>
> Subject: Re: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT
>
> On 2020-08-22 12:01 p.m., Roger Sayle wrote:
>> I suspect that the issue with the 64-bit patterns is that the second 
>> variant of pa.md's define_insn "shrpdi4" is unlikely ever to match as 
>> (minus:DI (const_int 64) x) is never "canonical" when x is itself a 
>> CONST_INT.  Splitting this define_insn into two (or three see below) 
>> separate forms; the first as it currently is and the second (as you 
>> suggest) with
>> 	"TARGET_64BIT
>> 	  && INTVAL (operands[3]) + INTVAL (operands[4]) == 64"
>> should do the trick.
> I will go ahead and add the basic patterns.  It seems it would be best if I avoid using the "plus_xor_ior_operator".  It also seems the 32-bit patterns should avoid it.
>> My first impression was that the DImode shrpd instructions would be 
>> most useful for implementing TI mode shifts, but that TI mode isn't 
>> supported by hppa64.  But then I noticed that the more immediate 
>> benefit would be in supporting rotrdi3 and rotldi3 on TARGET_64BIT 
>> that currently don't have expanders nor insns defined.  Here GCC 
>> currently generates three instructions where a single shrpd would be 
>> optimal.
> It turns out we now need to support TI mode and __int128 for libgomp.  The hppa64-hpux target won't boot without it.  I had just added a change to support TI mode but it's untested.
>
> Regards,
> Dave
>
> --
> John David Anglin  dave.anglin@bell.net
>


-- 
John David Anglin  dave.anglin@bell.net