From: Jeff Law <jeffreyalaw@gmail.com>
To: Philipp Tomsich <philipp.tomsich@vrull.eu>, gcc-patches@gcc.gnu.org
Cc: Kito Cheng <kito.cheng@gmail.com>,
Christoph Muellner <christoph.muellner@vrull.eu>,
Vineet Gupta <vineetg@rivosinc.com>,
Jeff Law <jlaw@ventanamicro.com>,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: Re: [PATCH] RISC-V: Use binvi to cover more immediates than with xori alone
Date: Tue, 15 Nov 2022 20:45:43 -0700 [thread overview]
Message-ID: <1c091d0d-e355-8fd8-8c6b-1bfe77f20291@gmail.com> (raw)
In-Reply-To: <20221110213501.3592470-1-philipp.tomsich@vrull.eu>
On 11/10/22 14:35, Philipp Tomsich wrote:
> Sequences of the form "a ^ C" with C being the positive half of a
> signed immediate's range with one extra bit set in addtion are mapped
> to xori and one binvi to avoid using a temporary (and a multi-insn
> sequence to load C into that temporary).
>
> gcc/ChangeLog:
>
> * config/riscv/bitmanip.md (*binvi<mode>_extrabit): New pattern.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/zbs-binvi.c: New test.
Could this have been potentially done by extending the ior pattern with
a code iterator that covered IOR/XOR?
Not a big deal, but if it'd work, consider to avoid the pattern duplication.
OK.
jeff
next prev parent reply other threads:[~2022-11-16 3:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 21:35 Philipp Tomsich
2022-11-16 3:45 ` Jeff Law [this message]
2022-11-16 9:17 ` Philipp Tomsich
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