From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 10BE53858CDA for ; Tue, 11 Jul 2023 00:08:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 10BE53858CDA Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=us.ibm.com Received: from pps.filterd (m0353725.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36B07ui7024102; Tue, 11 Jul 2023 00:08:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : subject : from : to : cc : date : in-reply-to : references : content-type : mime-version : content-transfer-encoding; s=pp1; bh=mgrs6bhdF4jRSWQabaULAVBMWCccO7eOUd6Kf33NDCA=; b=GtgENTGbVH7iNhQGvEK560lzhB9/sJqw629f+Qc5Tcywka8/EwvFLeM4oA89vWGWtm17 9KlDTAy25tkgGlx9W8RZv1SOVrQ40XijnqrHMOkLuchs2Dn8l5HVeC320+2gaHzAIu/s 4OJF3WW0jeSfnpOSjpwAtWhuZP/WVY9J5sxM9QGROjbLF+uV2HgV0gBvwPK7QQYlGYbE Cihani4mdBKxUwHZjnlfnKBv4yyS975vzlRhXk3p3rX0CUpPKccNH4ElcE5fT2iN7XsF QYSKv6ky+Vlu85A/zG2RlCFwXmbE8D2Z0wPGdHG0/o/pBGG9jZ0RjCgX71OIou7GvYxv dA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rrv1vr746-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Jul 2023 00:08:00 +0000 Received: from m0353725.ppops.net (m0353725.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 36B07xYY024905; Tue, 11 Jul 2023 00:07:59 GMT Received: from ppma03dal.us.ibm.com (b.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.11]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rrv1vr6mt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Jul 2023 00:07:58 +0000 Received: from pps.filterd (ppma03dal.us.ibm.com [127.0.0.1]) by ppma03dal.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 36AKUsaY026465; Tue, 11 Jul 2023 00:04:31 GMT Received: from smtprelay02.wdc07v.mail.ibm.com ([9.208.129.120]) by ppma03dal.us.ibm.com (PPS) with ESMTPS id 3rpye5kuh6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Jul 2023 00:04:31 +0000 Received: from smtpav05.dal12v.mail.ibm.com (smtpav05.dal12v.mail.ibm.com [10.241.53.104]) by smtprelay02.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 36B04TlB64225544 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 11 Jul 2023 00:04:29 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1AD5958065; Tue, 11 Jul 2023 00:04:29 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9413458052; Tue, 11 Jul 2023 00:04:28 +0000 (GMT) Received: from li-e362e14c-2378-11b2-a85c-87d605f3c641.ibm.com (unknown [9.61.18.149]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP; Tue, 11 Jul 2023 00:04:28 +0000 (GMT) Message-ID: <1de8ad970af4ee56a21553eb23e0d34f2d01e6d1.camel@us.ibm.com> Subject: Re: [PATCH ver3] rs6000, Add return value to __builtin_set_fpscr_rn From: Carl Love To: Peter Bergner , Segher Boessenkool , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, "Kewen.Lin" Cc: cel@us.ibm.com Date: Mon, 10 Jul 2023 17:04:28 -0700 In-Reply-To: References: <32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-18.el8) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 7LqhMu7-6Kg21Y3yxSCYhMd9eIKR1wjt X-Proofpoint-ORIG-GUID: -EB5aKv1TX8UKKKlVA5U87s_lfog_sme X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-10_17,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 spamscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 priorityscore=1501 adultscore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307100218 X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Peter: On Mon, 2023-07-10 at 16:57 -0500, Peter Bergner wrote: > On 7/10/23 2:18 PM, Carl Love wrote: > > + /* Get the current FPSCR fields, bits 29:31 (DRN) and bits 56:63 > > (VE, OE, UE, > > + ZE, XE, NI, RN) from the FPSCR and return them. */ > > The 'Z' above should line up directly under the 'G' in Get. Yup. Fixed. > > > > - /* Insert new RN mode into FSCPR. */ > > - emit_insn (gen_rs6000_mffs (tmp_df)); > > - tmp_di = simplify_gen_subreg (DImode, tmp_df, DFmode, 0); > > - emit_insn (gen_anddi3 (tmp_di, tmp_di, GEN_INT (-4))); > > - emit_insn (gen_iordi3 (tmp_di, tmp_di, tmp_rn)); > > + /* Insert the new RN value from tmp_rn into FPSCR bit > > [62:63]. */ > > + emit_insn (gen_anddi3 (tmp_di1, tmp_di2, GEN_INT (-4))); > > + emit_insn (gen_iordi3 (tmp_di1, tmp_di1, tmp_rn)); > > This is an expander, so you shouldn't reuse temporaries as multiple > destination pseudos, since that limits the register allocator's > freedom. > I know the old code did it, but since you're changing the line, you > might as well use a new temp. OK, wasn't aware that reusing temps was an issue for the register allocator. Thanks for letting me know. So, I think you want something like: rtx tmp_rn = gen_reg_rtx (DImode); rtx tmp_di3 = gen_reg_rtx (DImode); /* Extract new RN mode from operand. */ rtx op1 = convert_to_mode (DImode, operands[1], false); emit_insn (gen_anddi3 (tmp_rn, op1, GEN_INT (3))); /* Insert the new RN value from tmp_rn into FPSCR bit [62:63]. */ emit_insn (gen_anddi3 (tmp_di1, tmp_di2, GEN_INT (-4))); emit_insn (gen_iordi3 (tmp_di3, tmp_di1, tmp_rn)); /* Need to write to field k=15. The fields are [0:15]. Hence with L=0, W=0, FLM_i must be equal to 8, 16 = i + 8*(1-W). FLM is an 8-bit field[0:7]. Need to set the bit that corresponds to the value of i that you want [0:7]. */ tmp_df = simplify_gen_subreg (DFmode, tmp_di3, DImode, 0); where each destination is a unique register. Then let the register allocator can decide if it wants to use the same register or not at code generation time. I made the change and did a quick check compiling on Power 10 with mcpu=power[8,9,10] and it worked fine. I will run the full regression on each of the processor types just to be sure. Carl