From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 8D2923858D28 for ; Tue, 29 Aug 2023 03:31:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8D2923858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id CC82C300089; Tue, 29 Aug 2023 03:31:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1693279867; bh=xFgrLr6Ks36uvAoKr6QKWXd8dwSOh+33Al2/amozbw0=; h=From:To:Cc:Subject:Date:Message-ID:Mime-Version: Content-Transfer-Encoding; b=fAgM+X/Wo8vrBDsOD4T+KspWX74TdffQCmK0hElaewAiVoScIbsYdHqW1SctQWr0u qUH8BiIaF2fCjZV/cLoXKEHRoRt4qUt3iBqZa5rFDXjfx/F3AOw022ZxFDSamnh57b MLqUZd/7c5CGTOtsm7dKuRwknZDtm2FnwaThHoRc= From: Tsukasa OI To: Tsukasa OI , Kito Cheng , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] RISC-V: Make arch-24.c to test "success" case Date: Tue, 29 Aug 2023 03:31:02 +0000 Message-ID: <1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,KAM_MANYTO,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Tsukasa OI arch-24.c and arch-25.c are exactly the same and redundant. The author suspects that the original author intended to test two base ISAs (RV32I and RV64I) so this commit changes arch-24.c to test that RV32I+Zcf does not cause any errors. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-24.c: Test RV32I+Zcf instead. --- gcc/testsuite/gcc.target/riscv/arch-24.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/arch-24.c b/gcc/testsuite/gcc.target/riscv/arch-24.c index 3be4ade65a77..af15c3234b5e 100644 --- a/gcc/testsuite/gcc.target/riscv/arch-24.c +++ b/gcc/testsuite/gcc.target/riscv/arch-24.c @@ -1,5 +1,3 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64i_zcf -mabi=lp64" } */ +/* { dg-options "-march=rv32i_zcf -mabi=ilp32" } */ int foo() {} -/* { dg-error "'-march=rv64i_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */ -/* { dg-error "'-march=rv64i_zca_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */ base-commit: 818cc9f2d2f3dbbd4004ff85d3125d92d1e430c9 -- 2.42.0