From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 2F7B9385084C for ; Mon, 20 Mar 2023 06:31:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2F7B9385084C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32K4q1ns010633; Mon, 20 Mar 2023 06:31:57 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : from : subject : to : cc : content-type : content-transfer-encoding; s=pp1; bh=H8VeHGUymPOglaKj+nQKnSczCr6BgfKjq5fkw261oBQ=; b=iEKjpVlo3dGQlItJKjgBB2lE01RUaYB8++L5H4u3ZHBVdUhYOuYJMsVHtl3owc8ZNjSs nGDwFoF/j8rtLx3fFbdXqZQktNjUFjwzMJDjxCOkichz6slr0MZqn6cj+8BiPupj1XGn 1nEQ/66ah3c9JK5V3OxU0ozaNT7pHTnVWf/sZJwQULVCIK+idG7nUHZWtKHndMHlYU70 Wso4Y6vUfOASRoX/kbFUS1xoRMuv7W89Pu3jLOs752EFigiA2fI31ltimGOQqWm5koBS Yt9CQrHohQ+Kvq60L5ol0kTmC8n+zgkwJ8BfnmLdqXsPY+GQAhXlEP8AkXEzAHCVzEF9 NA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3pdq80ymm7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Mar 2023 06:31:57 +0000 Received: from m0098420.ppops.net (m0098420.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 32K6TDcD013196; Mon, 20 Mar 2023 06:31:56 GMT Received: from ppma02fra.de.ibm.com (47.49.7a9f.ip4.static.sl-reverse.com [159.122.73.71]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3pdq80ymjb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Mar 2023 06:31:56 +0000 Received: from pps.filterd (ppma02fra.de.ibm.com [127.0.0.1]) by ppma02fra.de.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 32JD1WGo003592; Mon, 20 Mar 2023 06:31:55 GMT Received: from smtprelay03.fra02v.mail.ibm.com ([9.218.2.224]) by ppma02fra.de.ibm.com (PPS) with ESMTPS id 3pd4x6ab9d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Mar 2023 06:31:54 +0000 Received: from smtpav06.fra02v.mail.ibm.com (smtpav06.fra02v.mail.ibm.com [10.20.54.105]) by smtprelay03.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 32K6VqlB5374480 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 Mar 2023 06:31:52 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6DFBA2004B; Mon, 20 Mar 2023 06:31:52 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B2A2C20040; Mon, 20 Mar 2023 06:31:50 +0000 (GMT) Received: from [9.177.11.227] (unknown [9.177.11.227]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 Mar 2023 06:31:50 +0000 (GMT) Message-ID: <1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com> Date: Mon, 20 Mar 2023 14:31:49 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US From: "Kewen.Lin" Subject: [PATCH] rs6000: Ensure vec_sld shift count in allowable range [PR109082] To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: p8Ah6kv878gVQ5aQlyiXkGuNQ5uNyUD6 X-Proofpoint-ORIG-GUID: gX5xjLVpRtlne5MBdDlC1JMDkTAr6-i8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-20_03,2023-03-16_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 impostorscore=0 mlxscore=0 spamscore=0 bulkscore=0 mlxlogscore=923 lowpriorityscore=0 adultscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303200053 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, As PR109082 shows, some uses of vec_sld in emmintrin.h don't strictly guarantee the given shift count is in the range 0-15 (inclusive). This patch is to make the argument range constraint honored for those uses. Bootstrapped and regtested on powerpc64-linux-gnu P8 and powerpc64le-linux-gnu P9 and P10. I'm going to push this soon if no objections. BR, Kewen ----- PR target/109082 gcc/ChangeLog: * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less than zero when calling vec_sld. (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than zero when calling vec_sld. (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger than zero when calling vec_sld. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr109082.c: New test. --- gcc/config/rs6000/emmintrin.h | 10 +++++++--- gcc/testsuite/gcc.target/powerpc/pr109082.c | 14 ++++++++++++++ 2 files changed, 21 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109082.c diff --git a/gcc/config/rs6000/emmintrin.h b/gcc/config/rs6000/emmintrin.h index f6a6dbf399a..bfff7ff6fea 100644 --- a/gcc/config/rs6000/emmintrin.h +++ b/gcc/config/rs6000/emmintrin.h @@ -1601,7 +1601,7 @@ _mm_bslli_si128 (__m128i __A, const int __N) __v16qu __result; const __v16qu __zeros = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - if (__N < 16) + if (__N >= 0 && __N < 16) __result = vec_sld ((__v16qu) __A, __zeros, __N); else __result = __zeros; @@ -1615,7 +1615,9 @@ _mm_bsrli_si128 (__m128i __A, const int __N) __v16qu __result; const __v16qu __zeros = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - if (__N < 16) + if (__N == 0) + return __A; + else if (__N > 0 && __N < 16) #ifdef __LITTLE_ENDIAN__ if (__builtin_constant_p(__N)) /* Would like to use Vector Shift Left Double by Octet @@ -1650,7 +1652,9 @@ _mm_slli_si128 (__m128i __A, const int _imm5) __v16qu __result; const __v16qu __zeros = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - if (_imm5 < 16) + if (_imm5 == 0) + return __A; + else if (_imm5 > 0 && _imm5 < 16) #ifdef __LITTLE_ENDIAN__ __result = vec_sld ((__v16qu) __A, __zeros, _imm5); #else diff --git a/gcc/testsuite/gcc.target/powerpc/pr109082.c b/gcc/testsuite/gcc.target/powerpc/pr109082.c new file mode 100644 index 00000000000..98da22c386b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109082.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mvsx" } */ + +/* Verify there is no warning message. */ + +#define NO_WARN_X86_INTRINSICS 1 +#include + +__m128i +foo (__m128i A) +{ + return _mm_bsrli_si128 (A, 0); +} -- 2.31.1