From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id C994A385780B for ; Thu, 19 Nov 2020 20:08:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org C994A385780B Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0AJK4ww0076222; Thu, 19 Nov 2020 15:08:21 -0500 Received: from ppma04dal.us.ibm.com (7a.29.35a9.ip4.static.sl-reverse.com [169.53.41.122]) by mx0a-001b2d01.pphosted.com with ESMTP id 34wy6jged4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 19 Nov 2020 15:08:21 -0500 Received: from pps.filterd (ppma04dal.us.ibm.com [127.0.0.1]) by ppma04dal.us.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 0AJJwSmb024796; Thu, 19 Nov 2020 20:08:20 GMT Received: from b03cxnp08028.gho.boulder.ibm.com (b03cxnp08028.gho.boulder.ibm.com [9.17.130.20]) by ppma04dal.us.ibm.com with ESMTP id 34t6v9tx1b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 19 Nov 2020 20:08:20 +0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 0AJK8IkD60162362 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 19 Nov 2020 20:08:18 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DB4346E05D; Thu, 19 Nov 2020 20:08:17 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3B0CE6E056; Thu, 19 Nov 2020 20:08:17 +0000 (GMT) Received: from [9.160.103.180] (unknown [9.160.103.180]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 19 Nov 2020 20:08:16 +0000 (GMT) Subject: Re: [PATCH,rs6000] Make MMA builtins use opaque modes [v2] To: acsawdey@linux.ibm.com, gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, wschmidt@linux.ibm.com References: <20201119185847.703536-1-acsawdey@linux.ibm.com> From: Peter Bergner Message-ID: <1f1e7da8-597e-ab82-97e5-61e374dc0f59@linux.ibm.com> Date: Thu, 19 Nov 2020 14:08:16 -0600 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.4.3 MIME-Version: 1.0 In-Reply-To: <20201119185847.703536-1-acsawdey@linux.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737 definitions=2020-11-19_10:2020-11-19, 2020-11-19 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 phishscore=0 mlxlogscore=981 spamscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2011190138 X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Nov 2020 20:08:22 -0000 On 11/19/20 12:58 PM, acsawdey@linux.ibm.com wrote: > +(define_expand "mma_disassemble_pair" > + [(match_operand:V16QI 0 "mma_disassemble_output_operand") > + (match_operand:OO 1 "input_operand") > + (match_operand 2 "const_0_to_1_operand")] Maybe we should use vsx_register_operand instead of input_operand here? > +(define_insn_and_split "*mma_disassemble_pair" > + [(set (match_operand:V16QI 0 "mma_disassemble_output_operand" "=mwa") > + (unspec:V16QI [(match_operand:OO 1 "input_operand" "wa") > + (match_operand 2 "const_0_to_1_operand")] > + UNSPEC_MMA_EXTRACT))] Likewise? > + "TARGET_MMA > + && fpr_reg_operand (operands[1], OOmode)" pairs can be assigned to any vsx register, so I think we want vsx_register_operand here too. > +(define_expand "mma_disassemble_acc" > + [(match_operand:V16QI 0 "mma_disassemble_output_operand") > + (match_operand:XO 1 "input_operand") > + (match_operand 2 "const_0_to_3_operand")] Likewise as above, do we want to use the fpr_reg_operand predicate here instead of input_operand? > +(define_insn_and_split "*mma_disassemble_acc" > + [(set (match_operand:V16QI 0 "mma_disassemble_output_operand" "=mwa") > + (unspec:V16QI [(match_operand:XO 1 "input_operand" "d") > + (match_operand 2 "const_0_to_3_operand")] Likewise? Peter