Re: powerpc64 libffi not yet ported

Re: powerpc64 libffi not yet ported

[David Edelsohn]

Alan> + # this may not be correct
Alan> + sysdeps_dir=powerpc

Tom> Could you look at this code to see if it will work for this powerpc64?

	The code generally is correct except that compare_and_swap need to
use 64-bit load-linked-store-conditional instructions, not 32-bit, because
size_t will be a 64-bit object.

	I think that localizing the maintenance and using some #ifdef is
better than two separate directories.

	For AIX, we probably need a separate directory because one needs
to use AIX primitives, not the the processor instructions.  Similar to the
compare_and_swap support in libstdc++-v3.

David

Re: powerpc64 libffi not yet ported

[Tom Tromey]

>>>>> "David" == David Edelsohn <dje@watson.ibm.com> writes:

David> I think that localizing the maintenance and using some #ifdef
David> is better than two separate directories.

Sounds good, thanks for looking at this.

Tom

Re: powerpc64 libffi not yet ported

[Alan Modra]

On Fri, Jul 26, 2002 at 02:28:59PM -0400, David Edelsohn wrote:
> Alan> + # this may not be correct
> Alan> + sysdeps_dir=powerpc
> 
> Tom> Could you look at this code to see if it will work for this powerpc64?
> 
> 	The code generally is correct except that compare_and_swap need to
> use 64-bit load-linked-store-conditional instructions, not 32-bit, because
> size_t will be a 64-bit object.
> 
> 	I think that localizing the maintenance and using some #ifdef is
> better than two separate directories.

Well, that's easy.

libjava/ChangeLog
	* sysdep/powerpc/locks.h: Formatting.
	(compare_and_swap): Support powerpc64.
	(compare_and_swap_release): Likewise.

powerpc-linux bootstrap and regression test in progress.  OK mainline
assuming no regressions?

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Index: libjava/sysdep/powerpc/locks.h
===================================================================
RCS file: /cvs/gcc/gcc/libjava/sysdep/powerpc/locks.h,v
retrieving revision 1.2
diff -u -p -r1.2 locks.h
--- libjava/sysdep/powerpc/locks.h	21 Mar 2002 00:26:45 -0000	1.2
+++ libjava/sysdep/powerpc/locks.h	27 Jul 2002 08:23:10 -0000
@@ -15,21 +15,32 @@ typedef size_t obj_addr_t;	/* Integer ty
 				/* address.				*/
 
 inline static bool
-compare_and_swap(volatile obj_addr_t *addr,
-		  			      obj_addr_t old,
-					      obj_addr_t new_val) 
+compare_and_swap (volatile obj_addr_t *addr, obj_addr_t old,
+		  obj_addr_t new_val) 
 {
   int ret;
 
-  __asm__ __volatile__ (
+  if (sizeof (obj_addr_t) == 8)
+    __asm__ __volatile__ (
+	   "0:    ldarx %0,0,%1 ;"
+	   "      xor. %0,%3,%0;"
+	   "      bne 1f;"
+	   "      stdcx. %2,0,%1;"
+	   "      bne- 0b;"
+	   "1:    "
+	: "=&r" (ret)
+	: "r" (addr), "r" (new_val), "r" (old)
+	: "cr0", "memory");
+  else
+    __asm__ __volatile__ (
 	   "0:    lwarx %0,0,%1 ;"
 	   "      xor. %0,%3,%0;"
 	   "      bne 1f;"
 	   "      stwcx. %2,0,%1;"
 	   "      bne- 0b;"
 	   "1:    "
-	: "=&r"(ret)
-	: "r"(addr), "r"(new_val), "r"(old)
+	: "=&r" (ret)
+	: "r" (addr), "r" (new_val), "r" (old)
 	: "cr0", "memory");
   /* This version of __compare_and_swap is to be used when acquiring
      a lock, so we don't need to worry about whether other memory
@@ -40,29 +51,40 @@ compare_and_swap(volatile obj_addr_t *ad
 }
 
 inline static void
-release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
+release_set (volatile obj_addr_t *addr, obj_addr_t new_val)
 {
   __asm__ __volatile__ ("sync" : : : "memory");
-  *(addr) = new_val;
+  *addr = new_val;
 }
 
 inline static bool
-compare_and_swap_release(volatile obj_addr_t *addr,
-		  				     obj_addr_t old,
-						     obj_addr_t new_val)
+compare_and_swap_release (volatile obj_addr_t *addr, obj_addr_t old,
+			  obj_addr_t new_val)
 {
   int ret;
 
   __asm__ __volatile__ ("sync" : : : "memory");
-  __asm__ __volatile__ (
+  if (sizeof (obj_addr_t) == 8)
+    __asm__ __volatile__ (
+	   "0:    ldarx %0,0,%1 ;"
+	   "      xor. %0,%3,%0;"
+	   "      bne 1f;"
+	   "      stdcx. %2,0,%1;"
+	   "      bne- 0b;"
+	   "1:    "
+	: "=&r" (ret)
+	: "r" (addr), "r" (new_val), "r" (old)
+	: "cr0", "memory");
+  else
+    __asm__ __volatile__ (
 	   "0:    lwarx %0,0,%1 ;"
 	   "      xor. %0,%3,%0;"
 	   "      bne 1f;"
 	   "      stwcx. %2,0,%1;"
 	   "      bne- 0b;"
 	   "1:    "
-	: "=&r"(ret)
-	: "r"(addr), "r"(new_val), "r"(old)
+	: "=&r" (ret)
+	: "r" (addr), "r" (new_val), "r" (old)
 	: "cr0", "memory");
   return ret == 0;
 }
@@ -70,7 +92,7 @@ compare_and_swap_release(volatile obj_ad
 // Ensure that subsequent instructions do not execute on stale
 // data that was loaded from memory before the barrier.
 inline static void
-read_barrier()
+read_barrier ()
 {
   __asm__ __volatile__ ("isync" : : : "memory");
 }
@@ -78,7 +100,7 @@ read_barrier()
 // Ensure that prior stores to memory are completed with respect to other
 // processors.
 inline static void
-write_barrier()
+write_barrier ()
 {
   __asm__ __volatile__ ("sync" : : : "memory");
 }

powerpc64 libstdc++

[Alan Modra]

On Fri, Jul 26, 2002 at 02:28:59PM -0400, David Edelsohn wrote:
> to use AIX primitives, not the the processor instructions.  Similar to the
> compare_and_swap support in libstdc++-v3.

That reminds me.  No occurrences of __always_swap anywhere in the gcc
repo, except here and arm/atomicity.h.  Similarly for __test_and_set,
except for one protected by #ifdef MIPS in boehm-gc/include/private/.
Given that we don't need these two functions, the other two,
__exchange_and_add and __atomic_add will work fine for powerpc64.

libstdc++-v3/ChangeLog
	* configure.target (cpu_include_dir): Use cpu/powerpc for powerpc64.
	* config/cpu/powerpc/atomicity.h (__always_swap): Remove.
	(__test_and_set): Remove.

OK mainline?  I'll rip out the arm/atomicity.h ones too, if you like.

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Index: libstdc++-v3/configure.target
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/configure.target,v
retrieving revision 1.47
diff -u -p -r1.47 configure.target
--- libstdc++-v3/configure.target	11 Jul 2002 18:56:58 -0000	1.47
+++ libstdc++-v3/configure.target	27 Jul 2002 08:36:30 -0000
@@ -85,7 +85,7 @@ case "${target_cpu}" in
   mmix)
     ATOMICITYH="cpu/generic"
     ;;
-  powerpc | rs6000)
+  powerpc* | rs6000)
     cpu_include_dir="cpu/powerpc"
     ;;
   s390 | s390x)
Index: libstdc++-v3/config/cpu/powerpc/atomicity.h
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/powerpc/atomicity.h,v
retrieving revision 1.3
diff -u -p -r1.3 atomicity.h
--- libstdc++-v3/config/cpu/powerpc/atomicity.h	24 Jun 2002 05:48:14 -0000	1.3
+++ libstdc++-v3/config/cpu/powerpc/atomicity.h	27 Jul 2002 08:36:30 -0000
@@ -69,44 +69,4 @@ __atomic_add (volatile _Atomic_word *__m
 	: "cr0", "memory");
 }
 
-static inline long
-__attribute__ ((__unused__))
-__always_swap (volatile long *__p, long int __newval)
-{
-  long __res;
-  __asm__ __volatile__ (
-	"/* Inline always swap */\n"
-	"0:\t"
-	"lwarx    %0,0,%1 \n\t"
-	"stwcx.   %2,0,%1 \n\t"
-	"bne-     0b \n\t"
-	"/* End always swap */"
-	: "=&r"(__res)
-	: "r"(__p), "r"(__newval)
-	: "cr0", "memory");
-  return __res;
-}
-
-static inline int
-__attribute__ ((__unused__))
-__test_and_set (volatile long *__p, long int __newval)
-{
-  int __res;
-  __asm__ __volatile__ (
-	"/* Inline test & set */\n"
-	"0:\t"
-	"lwarx    %0,0,%1 \n\t"
-	"cmpwi    %0,0 \n\t"
-	"bne-     1f \n\t"
-	"stwcx.   %2,0,%1 \n\t"
-	"bne-     0b \n"
-	"1:\n\t"
-	"/* End test & set */"
-	: "=&r"(__res)
-	: "r"(__p), "r"(__newval)
-	: "cr0", "memory");
-  return __res;
-}
-
 #endif /* atomicity.h */
-

Re: powerpc64 libffi not yet ported

[David Edelsohn]

	Is a C conditional in the middle of the inline asm really the best
way to do this?  I don't like this style much.

David

Re: powerpc64 libstdc++

[David Edelsohn]

libstdc++-v3/ChangeLog
	* configure.target (cpu_include_dir): Use cpu/powerpc for powerpc64.
	* config/cpu/powerpc/atomicity.h (__always_swap): Remove.
	(__test_and_set): Remove.

Expanding the target to cover powerpc64 is fine.

I'm not sure why it's worth removing the other atomic ops now that they
are there.  I thought part of the reason they were present is because of
glibc, which shares/shared libio code with libstdc++.

David

Re: powerpc64 libstdc++

[Alan Modra]

On Sat, Jul 27, 2002 at 04:14:24PM -0400, David Edelsohn wrote:
> libstdc++-v3/ChangeLog
> 	* configure.target (cpu_include_dir): Use cpu/powerpc for powerpc64.
> 	* config/cpu/powerpc/atomicity.h (__always_swap): Remove.
> 	(__test_and_set): Remove.
> 
> Expanding the target to cover powerpc64 is fine.
> 
> I'm not sure why it's worth removing the other atomic ops now that they
> are there.  I thought part of the reason they were present is because of
> glibc, which shares/shared libio code with libstdc++.

I should have mentioned that I checked current glibc sources too.  It's
wrong to leave these functions in without some changes as they operate
on "long", yet use "lwarx" and "stwcx.".

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Re: powerpc64 libstdc++

[David Edelsohn]

>>>>> Alan Modra writes:

Alan> I should have mentioned that I checked current glibc sources too.  It's
Alan> wrong to leave these functions in without some changes as they operate
Alan> on "long", yet use "lwarx" and "stwcx.".

	Okay, remove the other functions.

	Somehow I think this would be nicer with _LOAD_LINKED and
_STORE_CONDITONAL macros substituted in the inlined assembly and
conditionally set to the appropriate PowerPC instruction.

David

Re: powerpc64 libstdc++

[Alan Modra]

On Sat, Jul 27, 2002 at 08:20:30PM -0400, David Edelsohn wrote:
> >>>>> Alan Modra writes:
> 
> Alan> I should have mentioned that I checked current glibc sources too.  It's
> Alan> wrong to leave these functions in without some changes as they operate
> Alan> on "long", yet use "lwarx" and "stwcx.".
> 
> 	Okay, remove the other functions.
> 
> 	Somehow I think this would be nicer with _LOAD_LINKED and
> _STORE_CONDITONAL macros substituted in the inlined assembly and
> conditionally set to the appropriate PowerPC instruction.

http://www.gnu.org/prep/standards_11.html#SEC11 prefers "if ()" over
"#ifdef".

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Re: powerpc64 libstdc++

[David Edelsohn]

>>>>> Alan Modra writes:

Alan> http://www.gnu.org/prep/standards_11.html#SEC11 prefers "if ()" over
Alan> "#ifdef".

	"The most important point is to be self-consistent--try to stick
to the conventions you pick, and try to document them as much as
possible. That way, your program will be more maintainable by others."

GCC and libstdc++ use #ifdef and #if considerably.  Also, please see
libstdc++v3/config/cpu/m68k/atomicity.h .

David

Re: powerpc64 libstdc++

[David Edelsohn]

	Personally, I prefer a patch like the following for libstdc++
atomicity.h and Java locks.h:

*** atomicity.h.~1.3.~	Mon Jun 24 01:48:14 2002
--- atomicity.h	Sun Jul 28 17:07:22 2002
***************
*** 30,35 ****
--- 30,48 ----
  #ifndef _BITS_ATOMICITY_H
  #define _BITS_ATOMICITY_H	1
  
+ #if __glibcpp_long_bits == 64
+ #define _LARX "ldarx    %0,0,%2 \n\t"
+ #define _STCX "stdcx.   %1,0,%2 \n\t"
+ #else
+ #ifdef __PPC405__
+ #define _LARX "lwarx    %0,0,%2 \n\t"
+ #define _STCX "sync     \n\tstwcx.   %1,0,%2 \n\t"
+ #else
+ #define _LARX "lwarx    %0,0,%2 \n\t"
+ #define _STCX "stwcx.   %1,0,%2 \n\t"
+ #endif
+ #endif
+ 
  typedef int _Atomic_word;
  
  static inline _Atomic_word
***************
*** 40,48 ****
    __asm__ __volatile__ (
  	"/* Inline exchange & add */\n"
  	"0:\t"
! 	"lwarx    %0,0,%2 \n\t"
  	"add%I3   %1,%0,%3 \n\t"
! 	"stwcx.   %1,0,%2 \n\t"
  	"bne-     0b \n\t"
  	"/* End exchange & add */"
  	: "=&b"(__res), "=&r"(__tmp)
--- 53,61 ----
    __asm__ __volatile__ (
  	"/* Inline exchange & add */\n"
  	"0:\t"
! 	_LARX
  	"add%I3   %1,%0,%3 \n\t"
! 	_STCX
  	"bne-     0b \n\t"
  	"/* End exchange & add */"
  	: "=&b"(__res), "=&r"(__tmp)
***************
*** 59,111 ****
    __asm__ __volatile__ (
  	"/* Inline atomic add */\n"
  	"0:\t"
! 	"lwarx    %0,0,%1 \n\t"
  	"add%I2   %0,%0,%2 \n\t"
! 	"stwcx.   %0,0,%1 \n\t"
  	"bne-     0b \n\t"
  	"/* End atomic add */"
  	: "=&b"(__tmp)
  	: "r" (__mem), "Ir"(__val)
  	: "cr0", "memory");
- }
- 
- static inline long
- __attribute__ ((__unused__))
- __always_swap (volatile long *__p, long int __newval)
- {
-   long __res;
-   __asm__ __volatile__ (
- 	"/* Inline always swap */\n"
- 	"0:\t"
- 	"lwarx    %0,0,%1 \n\t"
- 	"stwcx.   %2,0,%1 \n\t"
- 	"bne-     0b \n\t"
- 	"/* End always swap */"
- 	: "=&r"(__res)
- 	: "r"(__p), "r"(__newval)
- 	: "cr0", "memory");
-   return __res;
- }
- 
- static inline int
- __attribute__ ((__unused__))
- __test_and_set (volatile long *__p, long int __newval)
- {
-   int __res;
-   __asm__ __volatile__ (
- 	"/* Inline test & set */\n"
- 	"0:\t"
- 	"lwarx    %0,0,%1 \n\t"
- 	"cmpwi    %0,0 \n\t"
- 	"bne-     1f \n\t"
- 	"stwcx.   %2,0,%1 \n\t"
- 	"bne-     0b \n"
- 	"1:\n\t"
- 	"/* End test & set */"
- 	: "=&r"(__res)
- 	: "r"(__p), "r"(__newval)
- 	: "cr0", "memory");
-   return __res;
  }
  
  #endif /* atomicity.h */
--- 72,85 ----
    __asm__ __volatile__ (
  	"/* Inline atomic add */\n"
  	"0:\t"
! 	_LARX
  	"add%I2   %0,%0,%2 \n\t"
! 	_STCX
  	"bne-     0b \n\t"
  	"/* End atomic add */"
  	: "=&b"(__tmp)
  	: "r" (__mem), "Ir"(__val)
  	: "cr0", "memory");
  }
  
  #endif /* atomicity.h */


This seems much cleaner and maintainable by localizing the differences
instead of duplicating a lot of code.

David

Re: powerpc64 libstdc++

[dank]

David Edelsohn wrote:
> 
>         Personally, I prefer a patch like the following for libstdc++
> atomicity.h and Java locks.h:
> 
> *** atomicity.h.~1.3.~  Mon Jun 24 01:48:14 2002
> --- atomicity.h Sun Jul 28 17:07:22 2002
> ... 
> + #if __glibcpp_long_bits == 64
> + #define _LARX "ldarx    %0,0,%2 \n\t"
> + #define _STCX "stdcx.   %1,0,%2 \n\t"
> + #else
> + #ifdef __PPC405__
> + #define _LARX "lwarx    %0,0,%2 \n\t"
> + #define _STCX "sync     \n\tstwcx.   %1,0,%2 \n\t"
> + #else
> + #define _LARX "lwarx    %0,0,%2 \n\t"
> + #define _STCX "stwcx.   %1,0,%2 \n\t"
> ...
> 
> This seems much cleaner and maintainable by localizing the differences
> instead of duplicating a lot of code.

That looks beautiful, go for it!

- Dan

Re: powerpc64 libstdc++

[Alan Modra]

On Sun, Jul 28, 2002 at 03:00:20PM -0700, dank@kegel.com wrote:
> David Edelsohn wrote:
> > 
> >         Personally, I prefer a patch like the following for libstdc++
> > atomicity.h and Java locks.h:
> > 
> > *** atomicity.h.~1.3.~  Mon Jun 24 01:48:14 2002
> > --- atomicity.h Sun Jul 28 17:07:22 2002
> 
> That looks beautiful, go for it!

No, it's wrong on two counts.  We don't want ldarx/stdcx in
atomicity.h because __exchange_and_add and __atomic_add operate on
32-bit ints.  Also, the stwcx. in __atomic_add uses different args.
David did say "like the following", so I suppose that lets him off the
hook.  ;-)

I get the impression Dan likes the #ifdef __PPC405__.  Here's another
libstdc++ and libjava patch.  David, are the extra ppc405 syncs really
needed for libjava?  The functions in locks.h are already doing syncs.

libstdc++-v3/ChangeLog
	* config/cpu/powerpc/cpu_limits.h (__glibcpp_long_bits): Define.
	* configure.target (cpu_include_dir): Use cpu/powerpc for powerpc64.
	* config/cpu/powerpc/atomicity.h (__always_swap): Remove.
	(__test_and_set): Remove.
	(_STWCX): Define and use.

libjava/ChangeLog
	* sysdep/powerpc/locks.h: Formatting.
	(_LARX): Define.
	(_STCX): Define.
	(compare_and_swap): Use _LARX and _STCX.
	(compare_and_swap_release): Likewise.

Index: libstdc++-v3/configure.target
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/configure.target,v
retrieving revision 1.47
diff -u -p -r1.47 configure.target
--- libstdc++-v3/configure.target	11 Jul 2002 18:56:58 -0000	1.47
+++ libstdc++-v3/configure.target	29 Jul 2002 00:31:36 -0000
@@ -85,7 +85,7 @@ case "${target_cpu}" in
   mmix)
     ATOMICITYH="cpu/generic"
     ;;
-  powerpc | rs6000)
+  powerpc* | rs6000)
     cpu_include_dir="cpu/powerpc"
     ;;
   s390 | s390x)
Index: libstdc++-v3/config/cpu/powerpc/atomicity.h
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/powerpc/atomicity.h,v
retrieving revision 1.3
diff -u -p -r1.3 atomicity.h
--- libstdc++-v3/config/cpu/powerpc/atomicity.h	24 Jun 2002 05:48:14 -0000	1.3
+++ libstdc++-v3/config/cpu/powerpc/atomicity.h	29 Jul 2002 00:31:36 -0000
@@ -30,6 +30,12 @@
 #ifndef _BITS_ATOMICITY_H
 #define _BITS_ATOMICITY_H	1
 
+#ifdef __PPC405__
+#define _STWCX "sync \n\tstwcx. "
+#else
+#define _STWCX "stwcx. "
+#endif
+
 typedef int _Atomic_word;
 
 static inline _Atomic_word
@@ -42,7 +48,7 @@ __exchange_and_add (volatile _Atomic_wor
 	"0:\t"
 	"lwarx    %0,0,%2 \n\t"
 	"add%I3   %1,%0,%3 \n\t"
-	"stwcx.   %1,0,%2 \n\t"
+	_STWCX "  %1,0,%2 \n\t"
 	"bne-     0b \n\t"
 	"/* End exchange & add */"
 	: "=&b"(__res), "=&r"(__tmp)
@@ -61,7 +67,7 @@ __atomic_add (volatile _Atomic_word *__m
 	"0:\t"
 	"lwarx    %0,0,%1 \n\t"
 	"add%I2   %0,%0,%2 \n\t"
-	"stwcx.   %0,0,%1 \n\t"
+	_STWCX "  %0,0,%1 \n\t"
 	"bne-     0b \n\t"
 	"/* End atomic add */"
 	: "=&b"(__tmp)
@@ -69,44 +75,4 @@ __atomic_add (volatile _Atomic_word *__m
 	: "cr0", "memory");
 }
 
-static inline long
-__attribute__ ((__unused__))
-__always_swap (volatile long *__p, long int __newval)
-{
-  long __res;
-  __asm__ __volatile__ (
-	"/* Inline always swap */\n"
-	"0:\t"
-	"lwarx    %0,0,%1 \n\t"
-	"stwcx.   %2,0,%1 \n\t"
-	"bne-     0b \n\t"
-	"/* End always swap */"
-	: "=&r"(__res)
-	: "r"(__p), "r"(__newval)
-	: "cr0", "memory");
-  return __res;
-}
-
-static inline int
-__attribute__ ((__unused__))
-__test_and_set (volatile long *__p, long int __newval)
-{
-  int __res;
-  __asm__ __volatile__ (
-	"/* Inline test & set */\n"
-	"0:\t"
-	"lwarx    %0,0,%1 \n\t"
-	"cmpwi    %0,0 \n\t"
-	"bne-     1f \n\t"
-	"stwcx.   %2,0,%1 \n\t"
-	"bne-     0b \n"
-	"1:\n\t"
-	"/* End test & set */"
-	: "=&r"(__res)
-	: "r"(__p), "r"(__newval)
-	: "cr0", "memory");
-  return __res;
-}
-
 #endif /* atomicity.h */
-
Index: libstdc++-v3/config/cpu/powerpc/cpu_limits.h
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/powerpc/cpu_limits.h,v
retrieving revision 1.1
diff -u -p -r1.1 cpu_limits.h
--- libstdc++-v3/config/cpu/powerpc/cpu_limits.h	24 Jun 2002 05:48:14 -0000	1.1
+++ libstdc++-v3/config/cpu/powerpc/cpu_limits.h	29 Jul 2002 00:31:36 -0000
@@ -28,6 +28,10 @@
 #ifndef _GLIBCPP_CPU_LIMITS
 #define _GLIBCPP_CPU_LIMITS 1
 
+#ifdef __powerpc64__
+#define __glibcpp_long_bits 64
+#endif
+
 #ifndef __LONG_DOUBLE_128__
 #define __glibcpp_long_double_bits 64
 #endif
Index: libjava/sysdep/powerpc/locks.h
===================================================================
RCS file: /cvs/gcc/gcc/libjava/sysdep/powerpc/locks.h,v
retrieving revision 1.2
diff -u -p -r1.2 locks.h
--- libjava/sysdep/powerpc/locks.h	21 Mar 2002 00:26:45 -0000	1.2
+++ libjava/sysdep/powerpc/locks.h	29 Jul 2002 00:31:43 -0000
@@ -11,26 +11,38 @@ details.  */
 #ifndef __SYSDEP_LOCKS_H__
 #define __SYSDEP_LOCKS_H__
 
+#ifdef __powerpc64__
+#define _LARX "ldarx "
+#define _STCX "stdcx. "
+#else
+#define _LARX "lwarx "
+#ifdef __PPC405__
+#define _STCX "sync; stwcx. "
+#else
+#define _STCX "stwcx. "
+#endif
+#endif
+
 typedef size_t obj_addr_t;	/* Integer type big enough for object	*/
 				/* address.				*/
 
 inline static bool
-compare_and_swap(volatile obj_addr_t *addr,
-		  			      obj_addr_t old,
-					      obj_addr_t new_val) 
+compare_and_swap (volatile obj_addr_t *addr, obj_addr_t old,
+		  obj_addr_t new_val) 
 {
   int ret;
 
   __asm__ __volatile__ (
-	   "0:    lwarx %0,0,%1 ;"
+	   "0:    " _LARX "%0,0,%1 ;"
 	   "      xor. %0,%3,%0;"
 	   "      bne 1f;"
-	   "      stwcx. %2,0,%1;"
+	   "      " _STCX "%2,0,%1;"
 	   "      bne- 0b;"
 	   "1:    "
-	: "=&r"(ret)
-	: "r"(addr), "r"(new_val), "r"(old)
+	: "=&r" (ret)
+	: "r" (addr), "r" (new_val), "r" (old)
 	: "cr0", "memory");
+
   /* This version of __compare_and_swap is to be used when acquiring
      a lock, so we don't need to worry about whether other memory
      operations have completed, but we do need to be sure that any loads
@@ -40,37 +52,38 @@ compare_and_swap(volatile obj_addr_t *ad
 }
 
 inline static void
-release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
+release_set (volatile obj_addr_t *addr, obj_addr_t new_val)
 {
   __asm__ __volatile__ ("sync" : : : "memory");
-  *(addr) = new_val;
+  *addr = new_val;
 }
 
 inline static bool
-compare_and_swap_release(volatile obj_addr_t *addr,
-		  				     obj_addr_t old,
-						     obj_addr_t new_val)
+compare_and_swap_release (volatile obj_addr_t *addr, obj_addr_t old,
+			  obj_addr_t new_val)
 {
   int ret;
 
   __asm__ __volatile__ ("sync" : : : "memory");
+
   __asm__ __volatile__ (
-	   "0:    lwarx %0,0,%1 ;"
+	   "0:    " _LARX "%0,0,%1 ;"
 	   "      xor. %0,%3,%0;"
 	   "      bne 1f;"
-	   "      stwcx. %2,0,%1;"
+	   "      " _STCX "%2,0,%1;"
 	   "      bne- 0b;"
 	   "1:    "
-	: "=&r"(ret)
-	: "r"(addr), "r"(new_val), "r"(old)
+	: "=&r" (ret)
+	: "r" (addr), "r" (new_val), "r" (old)
 	: "cr0", "memory");
+
   return ret == 0;
 }
 
 // Ensure that subsequent instructions do not execute on stale
 // data that was loaded from memory before the barrier.
 inline static void
-read_barrier()
+read_barrier ()
 {
   __asm__ __volatile__ ("isync" : : : "memory");
 }
@@ -78,7 +91,7 @@ read_barrier()
 // Ensure that prior stores to memory are completed with respect to other
 // processors.
 inline static void
-write_barrier()
+write_barrier ()
 {
   __asm__ __volatile__ ("sync" : : : "memory");
 }

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Re: powerpc64 libstdc++

[David Edelsohn]

	Now I remember that the 32-bit size of _Atomic_word came up when I
did the AIX port.

> I get the impression Dan likes the #ifdef __PPC405__.  Here's another
> libstdc++ and libjava patch.  David, are the extra ppc405 syncs really
> needed for libjava?  The functions in locks.h are already doing syncs.

	As far as I can tell from the errata, the syncs always are
necessary until the next rev of the PPC405.  The existing syncs in
locks.h, which are necessary for MP correctness, do not replace the PPC405
syncs which need to be inserted before the stwcx., as far as I understand.

	This patch looks really good to me.

Thanks, David

Re: powerpc64 libstdc++

[Daniel Jacobowitz]

On Mon, Jul 29, 2002 at 10:15:30AM +0930, Alan Modra wrote:
> On Sun, Jul 28, 2002 at 03:00:20PM -0700, dank@kegel.com wrote:
> > David Edelsohn wrote:
> > > 
> > >         Personally, I prefer a patch like the following for libstdc++
> > > atomicity.h and Java locks.h:
> > > 
> > > *** atomicity.h.~1.3.~  Mon Jun 24 01:48:14 2002
> > > --- atomicity.h Sun Jul 28 17:07:22 2002
> > 
> > That looks beautiful, go for it!
> 
> No, it's wrong on two counts.  We don't want ldarx/stdcx in
> atomicity.h because __exchange_and_add and __atomic_add operate on
> 32-bit ints.  Also, the stwcx. in __atomic_add uses different args.
> David did say "like the following", so I suppose that lets him off the
> hook.  ;-)
> 
> I get the impression Dan likes the #ifdef __PPC405__.  Here's another
> libstdc++ and libjava patch.  David, are the extra ppc405 syncs really
> needed for libjava?  The functions in locks.h are already doing syncs.

My only concern with this is that __PPC405__ will eventually be
inaccurate; there will probably be a new rev of this chip which does
not have the same atomicity problems.

Also, if you are going to commit this you also need the chunk from
Dan's patch which defines __PPC405__.  That isn't in yet.  And possibly
a note that --with-cpu=405 will not turn on __PPC405__, because of the
stupidity of specs...


> 
> libstdc++-v3/ChangeLog
> 	* config/cpu/powerpc/cpu_limits.h (__glibcpp_long_bits): Define.
> 	* configure.target (cpu_include_dir): Use cpu/powerpc for powerpc64.
> 	* config/cpu/powerpc/atomicity.h (__always_swap): Remove.
> 	(__test_and_set): Remove.
> 	(_STWCX): Define and use.
> 
> libjava/ChangeLog
> 	* sysdep/powerpc/locks.h: Formatting.
> 	(_LARX): Define.
> 	(_STCX): Define.
> 	(compare_and_swap): Use _LARX and _STCX.
> 	(compare_and_swap_release): Likewise.
> 
> Index: libstdc++-v3/configure.target
> ===================================================================
> RCS file: /cvs/gcc/gcc/libstdc++-v3/configure.target,v
> retrieving revision 1.47
> diff -u -p -r1.47 configure.target
> --- libstdc++-v3/configure.target	11 Jul 2002 18:56:58 -0000	1.47
> +++ libstdc++-v3/configure.target	29 Jul 2002 00:31:36 -0000
> @@ -85,7 +85,7 @@ case "${target_cpu}" in
>    mmix)
>      ATOMICITYH="cpu/generic"
>      ;;
> -  powerpc | rs6000)
> +  powerpc* | rs6000)
>      cpu_include_dir="cpu/powerpc"
>      ;;
>    s390 | s390x)
> Index: libstdc++-v3/config/cpu/powerpc/atomicity.h
> ===================================================================
> RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/powerpc/atomicity.h,v
> retrieving revision 1.3
> diff -u -p -r1.3 atomicity.h
> --- libstdc++-v3/config/cpu/powerpc/atomicity.h	24 Jun 2002 05:48:14 -0000	1.3
> +++ libstdc++-v3/config/cpu/powerpc/atomicity.h	29 Jul 2002 00:31:36 -0000
> @@ -30,6 +30,12 @@
>  #ifndef _BITS_ATOMICITY_H
>  #define _BITS_ATOMICITY_H	1
>  
> +#ifdef __PPC405__
> +#define _STWCX "sync \n\tstwcx. "
> +#else
> +#define _STWCX "stwcx. "
> +#endif
> +
>  typedef int _Atomic_word;
>  
>  static inline _Atomic_word
> @@ -42,7 +48,7 @@ __exchange_and_add (volatile _Atomic_wor
>  	"0:\t"
>  	"lwarx    %0,0,%2 \n\t"
>  	"add%I3   %1,%0,%3 \n\t"
> -	"stwcx.   %1,0,%2 \n\t"
> +	_STWCX "  %1,0,%2 \n\t"
>  	"bne-     0b \n\t"
>  	"/* End exchange & add */"
>  	: "=&b"(__res), "=&r"(__tmp)
> @@ -61,7 +67,7 @@ __atomic_add (volatile _Atomic_word *__m
>  	"0:\t"
>  	"lwarx    %0,0,%1 \n\t"
>  	"add%I2   %0,%0,%2 \n\t"
> -	"stwcx.   %0,0,%1 \n\t"
> +	_STWCX "  %0,0,%1 \n\t"
>  	"bne-     0b \n\t"
>  	"/* End atomic add */"
>  	: "=&b"(__tmp)
> @@ -69,44 +75,4 @@ __atomic_add (volatile _Atomic_word *__m
>  	: "cr0", "memory");
>  }
>  
> -static inline long
> -__attribute__ ((__unused__))
> -__always_swap (volatile long *__p, long int __newval)
> -{
> -  long __res;
> -  __asm__ __volatile__ (
> -	"/* Inline always swap */\n"
> -	"0:\t"
> -	"lwarx    %0,0,%1 \n\t"
> -	"stwcx.   %2,0,%1 \n\t"
> -	"bne-     0b \n\t"
> -	"/* End always swap */"
> -	: "=&r"(__res)
> -	: "r"(__p), "r"(__newval)
> -	: "cr0", "memory");
> -  return __res;
> -}
> -
> -static inline int
> -__attribute__ ((__unused__))
> -__test_and_set (volatile long *__p, long int __newval)
> -{
> -  int __res;
> -  __asm__ __volatile__ (
> -	"/* Inline test & set */\n"
> -	"0:\t"
> -	"lwarx    %0,0,%1 \n\t"
> -	"cmpwi    %0,0 \n\t"
> -	"bne-     1f \n\t"
> -	"stwcx.   %2,0,%1 \n\t"
> -	"bne-     0b \n"
> -	"1:\n\t"
> -	"/* End test & set */"
> -	: "=&r"(__res)
> -	: "r"(__p), "r"(__newval)
> -	: "cr0", "memory");
> -  return __res;
> -}
> -
>  #endif /* atomicity.h */
> -
> Index: libstdc++-v3/config/cpu/powerpc/cpu_limits.h
> ===================================================================
> RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/powerpc/cpu_limits.h,v
> retrieving revision 1.1
> diff -u -p -r1.1 cpu_limits.h
> --- libstdc++-v3/config/cpu/powerpc/cpu_limits.h	24 Jun 2002 05:48:14 -0000	1.1
> +++ libstdc++-v3/config/cpu/powerpc/cpu_limits.h	29 Jul 2002 00:31:36 -0000
> @@ -28,6 +28,10 @@
>  #ifndef _GLIBCPP_CPU_LIMITS
>  #define _GLIBCPP_CPU_LIMITS 1
>  
> +#ifdef __powerpc64__
> +#define __glibcpp_long_bits 64
> +#endif
> +
>  #ifndef __LONG_DOUBLE_128__
>  #define __glibcpp_long_double_bits 64
>  #endif
> Index: libjava/sysdep/powerpc/locks.h
> ===================================================================
> RCS file: /cvs/gcc/gcc/libjava/sysdep/powerpc/locks.h,v
> retrieving revision 1.2
> diff -u -p -r1.2 locks.h
> --- libjava/sysdep/powerpc/locks.h	21 Mar 2002 00:26:45 -0000	1.2
> +++ libjava/sysdep/powerpc/locks.h	29 Jul 2002 00:31:43 -0000
> @@ -11,26 +11,38 @@ details.  */
>  #ifndef __SYSDEP_LOCKS_H__
>  #define __SYSDEP_LOCKS_H__
>  
> +#ifdef __powerpc64__
> +#define _LARX "ldarx "
> +#define _STCX "stdcx. "
> +#else
> +#define _LARX "lwarx "
> +#ifdef __PPC405__
> +#define _STCX "sync; stwcx. "
> +#else
> +#define _STCX "stwcx. "
> +#endif
> +#endif
> +
>  typedef size_t obj_addr_t;	/* Integer type big enough for object	*/
>  				/* address.				*/
>  
>  inline static bool
> -compare_and_swap(volatile obj_addr_t *addr,
> -		  			      obj_addr_t old,
> -					      obj_addr_t new_val) 
> +compare_and_swap (volatile obj_addr_t *addr, obj_addr_t old,
> +		  obj_addr_t new_val) 
>  {
>    int ret;
>  
>    __asm__ __volatile__ (
> -	   "0:    lwarx %0,0,%1 ;"
> +	   "0:    " _LARX "%0,0,%1 ;"
>  	   "      xor. %0,%3,%0;"
>  	   "      bne 1f;"
> -	   "      stwcx. %2,0,%1;"
> +	   "      " _STCX "%2,0,%1;"
>  	   "      bne- 0b;"
>  	   "1:    "
> -	: "=&r"(ret)
> -	: "r"(addr), "r"(new_val), "r"(old)
> +	: "=&r" (ret)
> +	: "r" (addr), "r" (new_val), "r" (old)
>  	: "cr0", "memory");
> +
>    /* This version of __compare_and_swap is to be used when acquiring
>       a lock, so we don't need to worry about whether other memory
>       operations have completed, but we do need to be sure that any loads
> @@ -40,37 +52,38 @@ compare_and_swap(volatile obj_addr_t *ad
>  }
>  
>  inline static void
> -release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
> +release_set (volatile obj_addr_t *addr, obj_addr_t new_val)
>  {
>    __asm__ __volatile__ ("sync" : : : "memory");
> -  *(addr) = new_val;
> +  *addr = new_val;
>  }
>  
>  inline static bool
> -compare_and_swap_release(volatile obj_addr_t *addr,
> -		  				     obj_addr_t old,
> -						     obj_addr_t new_val)
> +compare_and_swap_release (volatile obj_addr_t *addr, obj_addr_t old,
> +			  obj_addr_t new_val)
>  {
>    int ret;
>  
>    __asm__ __volatile__ ("sync" : : : "memory");
> +
>    __asm__ __volatile__ (
> -	   "0:    lwarx %0,0,%1 ;"
> +	   "0:    " _LARX "%0,0,%1 ;"
>  	   "      xor. %0,%3,%0;"
>  	   "      bne 1f;"
> -	   "      stwcx. %2,0,%1;"
> +	   "      " _STCX "%2,0,%1;"
>  	   "      bne- 0b;"
>  	   "1:    "
> -	: "=&r"(ret)
> -	: "r"(addr), "r"(new_val), "r"(old)
> +	: "=&r" (ret)
> +	: "r" (addr), "r" (new_val), "r" (old)
>  	: "cr0", "memory");
> +
>    return ret == 0;
>  }
>  
>  // Ensure that subsequent instructions do not execute on stale
>  // data that was loaded from memory before the barrier.
>  inline static void
> -read_barrier()
> +read_barrier ()
>  {
>    __asm__ __volatile__ ("isync" : : : "memory");
>  }
> @@ -78,7 +91,7 @@ read_barrier()
>  // Ensure that prior stores to memory are completed with respect to other
>  // processors.
>  inline static void
> -write_barrier()
> +write_barrier ()
>  {
>    __asm__ __volatile__ ("sync" : : : "memory");
>  }
> 
> -- 
> Alan Modra
> IBM OzLabs - Linux Technology Centre
> 

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

Re: powerpc64 libstdc++

[David Edelsohn]

>>>>> Daniel Jacobowitz writes:

Daniel> My only concern with this is that __PPC405__ will eventually be
Daniel> inaccurate; there will probably be a new rev of this chip which does
Daniel> not have the same atomicity problems.

	So what?  That's life.

Daniel> Also, if you are going to commit this you also need the chunk from
Daniel> Dan's patch which defines __PPC405__.  That isn't in yet.  And possibly
Daniel> a note that --with-cpu=405 will not turn on __PPC405__, because of the
Daniel> stupidity of specs...

	Not everything needs to be committed simultaneously.

David

Re: powerpc64 libstdc++

[Daniel Jacobowitz]

On Mon, Jul 29, 2002 at 10:45:12AM -0400, David Edelsohn wrote:
> >>>>> Daniel Jacobowitz writes:
> 
> Daniel> My only concern with this is that __PPC405__ will eventually be
> Daniel> inaccurate; there will probably be a new rev of this chip which does
> Daniel> not have the same atomicity problems.
> 
> 	So what?  That's life.

I just think that this means that __PPC405__ isn't the right name for
the macro.

> 
> Daniel> Also, if you are going to commit this you also need the chunk from
> Daniel> Dan's patch which defines __PPC405__.  That isn't in yet.  And possibly
> Daniel> a note that --with-cpu=405 will not turn on __PPC405__, because of the
> Daniel> stupidity of specs...
> 
> 	Not everything needs to be committed simultaneously.
> 
> David
> 

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

Re: powerpc64 libstdc++

[dank]

Daniel Jacobowitz wrote:
> > I get the impression Dan likes the #ifdef __PPC405__.  Here's another
> > libstdc++ and libjava patch.  David, are the extra ppc405 syncs really
> > needed for libjava?  The functions in locks.h are already doing syncs.
> 
> My only concern with this is that __PPC405__ will eventually be
> inaccurate; there will probably be a new rev of this chip which does
> not have the same atomicity problems.

Of the several PPC405 chips, at least two models are affected, so IBM
will have to respin several chips to get rid of this problem.  I bet
bad chips live on for a long, long time.

Still, if you want to make the workaround an explicitly enabled thing, that
would be fine.  (And since you work for the company 
that was probably first shipped glibc's and kernels with workarounds
for this bug, you probably knows what you're talking about.)

Any chance a one-line comment could be left in next to the extra sync
that documented *why* the workaround is needed?  e.g. "IBM PPC405 erratum CPU_77"?
I suppose it's redundant, given google, but still.

> Also, if you are going to commit this you also need the chunk from
> Dan's patch which defines __PPC405__.  That isn't in yet.  And possibly
> a note that --with-cpu=405 will not turn on __PPC405__, because of the
> stupidity of specs...

Egads.  I thought --with-cpu=405 meant giving no -mcpu flag was the
same as giving -mcpu=405. Does --with-cpu flag need to be documented as buggy?
- Dan

Re: powerpc64 libstdc++

[David Edelsohn]

	When the -mabi/-mcpu/-march flags are reworked, the --with-cpu
issue should be fixed.  Those defines probably should be keyed off of the
rs6000_cpu enum.

David

Re: powerpc64 libstdc++

[Daniel Jacobowitz]

On Mon, Jul 29, 2002 at 11:33:54PM -0400, David Edelsohn wrote:
> 	When the -mabi/-mcpu/-march flags are reworked, the --with-cpu
> issue should be fixed.  Those defines probably should be keyed off of the
> rs6000_cpu enum.

I'll actually have a patch for that tomorrow.  Well, I've got it today,
but I need to clean up one nit first.

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

Re: powerpc64 libffi not yet ported

[dank]

David Edelsohn wrote:
>         The multilib is redundant.  If GCC is configured for ppc405, then
> build libstdc++ with the extra sync, period.  No multilib.

But then that gcc can't also generate good executables for, say, the ppc750,
which doesn't need the extra sync.  So the multilib is not redundant at all.

If the multilib stuff is so offensive to you, then go ahead and
commit just the changes to libjava/sysdep/powerpc/locks.h
and libstdc++-v3/config/cpu/powerpc/bits/atomicity.h   

I must admit I'm mystified by your opposition to the optional multilib
generation.  Could you explain the downside to it?

Thanks,
Dan

Re: powerpc64 libffi not yet ported

[David Edelsohn]

	The multilib is redundant.  If GCC is configured for ppc405, then
build libstdc++ with the extra sync, period.  No multilib.

David

Re: powerpc64 libffi not yet ported

[dank]

David Edelsohn wrote:
> > Also, please note that just having powerpc processor instructions
> > seems to also be insufficient, at least for some powerpc chips. See
> > libstdc++/7383. I'd appreciate it if a powerpc maintainer could figure
> > out how to work ppc405 work-arounds into the libstdc++ atomicity.h file. 
>
>         I am not currently inclined to create a PPC405 multilib, as
> suggested in the PR.  This basically says that one cannot use
> multithreaded apps or libraries created for any other PowerPC processor on
> this chip.  I can only see this as useful for GCC explicitly configured
> for PPC405, not a runtime option.

The patch referred to in the PR only creates a PPC405 multilib only
when using a GCC explicitly configured for PPC405.  It's behaving
exactly as you request, I think.  (If you look carefully at the
config-ml.in change, you'll see it *disables* the ppc405 multilib by
default.  Whoever configures GCC must explicitly enable the ppc405 multilib
if they want the workaround.)

Applying the patch would not affect anyone but PPC405 users, I'm quite sure.
Can you have another look, please?  Here's the latest version of the patch:
http://www.kegel.com/xgcc3/gcc-20020722-ppc405erratum77.patch

Thanks,
Dan

Re: powerpc64 libffi not yet ported

[Alan Modra]

On Fri, Jul 26, 2002 at 12:27:15PM -0400, Jeff Sturm wrote:
> On Fri, 26 Jul 2002, Alan Modra wrote:
> > +  powerpc64*-*)
> > +	# libffi not ported.
> > +	with_libffi_default=no
> 
> Will you by any chance be working on libffi for powerpc64?

If not me, then probably someone else from IBM's LTC.

> I assume this is an LP64 target?

Yes.

> I've had issues with sparc64 related to word size and endianness.
> Though the patches I recently posted contain a workaround, I'd like to
> solve them in a more general way.

I'd like to see someone else solve all the tricky problems so we
can do an easy port.  :-)

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Re: powerpc64 libffi not yet ported

[David Edelsohn]

	I am not currently inclined to create a PPC405 multilib, as
suggested in the PR.  This basically says that one cannot use
multithreaded apps or libraries created for any other PowerPC processor on
this chip.  I can only see this as useful for GCC explicitly configured
for PPC405, not a runtime option.

David

Re: powerpc64 libffi not yet ported

[Benjamin Kosnik]

> 	For AIX, we probably need a separate directory because one needs
> to use AIX primitives, not the the processor instructions.  Similar to the
> compare_and_swap support in libstdc++-v3.

Yep. I remember this issue well.

Also, please note that just having powerpc processor instructions
seems to also be insufficient, at least for some powerpc chips. See
libstdc++/7383. I'd appreciate it if a powerpc maintainer could figure
out how to work ppc405 work-arounds into the libstdc++ atomicity.h file. 

The work is mostly done and in the PR. Can I assign it to somebody,
and if so, who?

thanks!
benjamin

Re: powerpc64 libffi not yet ported

[Jeff Sturm]

On Fri, 26 Jul 2002, Alan Modra wrote:
> +  powerpc64*-*)
> +	# libffi not ported.
> +	with_libffi_default=no

Will you by any chance be working on libffi for powerpc64?  I assume this
is an LP64 target?

I've had issues with sparc64 related to word size and endianness.
Though the patches I recently posted contain a workaround, I'd like to
solve them in a more general way.

Jeff

Re: powerpc64 libffi not yet ported

[Tom Tromey]

>>>>> "Alan" == Alan Modra <amodra@bigpond.net.au> writes:

Alan> 	* configure.host: Add powerpc64*-* entry.
Alan> OK mainline?

Yes, thanks.

Alan> +	# this may not be correct
Alan> +	sysdeps_dir=powerpc

Could you look at this code to see if it will work for this powerpc64?

Tom

powerpc64 libffi not yet ported

[Alan Modra]

This at least lets us get to the point of compiling libjava on a
powerpc-linux host.

	* configure.host: Add powerpc64*-* entry.

OK mainline?

Index: libjava/configure.host
===================================================================
RCS file: /cvs/gcc/gcc/libjava/configure.host,v
retrieving revision 1.35
diff -u -p -r1.35 configure.host
--- libjava/configure.host	19 Jul 2002 14:41:14 -0000	1.35
+++ libjava/configure.host	26 Jul 2002 07:17:16 -0000
@@ -101,6 +101,16 @@ case "${host}" in
 	libgcj_interpreter=yes
 	enable_hash_synchronization_default=yes
 	;;
+  powerpc64*-*)
+	# libffi not ported.
+	with_libffi_default=no
+	libgcj_interpreter=no
+	libgcj_flags="${libgcj_flags} -mminimal-toc"
+	# this may not be correct
+	sysdeps_dir=powerpc
+	enable_hash_synchronization_default=yes
+	slow_pthread_self=yes
+	;;
   powerpc*-*)
 	sysdeps_dir=powerpc
 	libgcj_interpreter=yes

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre