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* RE: [patch] extend.texi MIPS PS/3D Support
@ 2004-09-23 18:02 Fu, Chao-Ying
  2004-09-24 12:17 ` Dorit Naishlos
  0 siblings, 1 reply; 36+ messages in thread
From: Fu, Chao-Ying @ 2004-09-23 18:02 UTC (permalink / raw)
  To: Richard Sandiford
  Cc: Dorit Naishlos, Giovanni Bajo, gcc-patches, dpatel,
	Gerald Pfeifer, Stephens, Nigel, Thekkath, Radhika, Uhler, Mike,
	Jim Wilson

I tested one case and got ICE, unfortunately.

Regards,
Chao-ying
---
<540> # cat vect1.c
#define N 16

void fbar (float *);

/* multiple loops */
foo (int n)
{
  int i;
  float a[N];
  float b[N];

  /* Vectorizable.  */
  for (i = 0; i < N; i++){
    a[i] = b[i];
  }

  fbar (a);
}
<541> # mipsisa64-elf-gcc -O2 -mips64 -mpaired-single -ftree-vectorize -fdump-tree-vect-stats -S vect1.c
vect1.c: In function 'foo':
vect1.c:7: internal compiler error: in int_mode_for_mode, at stor-layout.c:251
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.


-----Original Message-----
From: gcc-patches-owner@gcc.gnu.org
[mailto:gcc-patches-owner@gcc.gnu.org]On Behalf Of Richard Sandiford
Sent: Thursday, September 23, 2004 9:10 AM
To: Fu, Chao-Ying
Cc: Dorit Naishlos; Giovanni Bajo; gcc-patches@gcc.gnu.org;
dpatel@apple.com; Gerald Pfeifer; Stephens, Nigel; Thekkath, Radhika;
Uhler, Mike; Jim Wilson
Subject: Re: [patch] extend.texi MIPS PS/3D Support


"Fu, Chao-Ying" <fu@mips.com> writes:
> Ok.  We need to put this into "mips.h".  Thanks!
> [...]
> Index: mips.h
> ===================================================================
> RCS file: /cvsroot/gcc/gcc/gcc/config/mips/mips.h,v
> retrieving revision 1.370
> diff -c -3 -p -r1.370 mips.h
> *** mips.h	18 Sep 2004 19:19:37 -0000	1.370
> --- mips.h	22 Sep 2004 21:07:30 -0000
> *************** extern const struct mips_cpu_info *mips_
> *** 243,248 ****
> --- 243,250 ----
>   				((target_flags & MASK_PAIRED_SINGLE) != 0)
>   #define TARGET_MIPS3D		((target_flags & MASK_MIPS3D) != 0)
>   
> + #define UNITS_PER_SIMD_WORD	(TARGET_PAIRED_SINGLE_FLOAT ? 8 : 0)
> + 
>   /* True if we should use NewABI-style relocation operators for
>      symbolic addresses.  This is never true for mips16 code,
>      which has its own conventions.  */

Have you tested this?

Richard

^ permalink raw reply	[flat|nested] 36+ messages in thread
* RE: [patch] extend.texi MIPS PS/3D Support
@ 2004-09-24  0:12 Fu, Chao-Ying
  2004-10-02 11:35 ` Richard Sandiford
  0 siblings, 1 reply; 36+ messages in thread
From: Fu, Chao-Ying @ 2004-09-24  0:12 UTC (permalink / raw)
  To: Richard Sandiford
  Cc: James E Wilson, gcc-patches, Stephens, Nigel, Thekkath, Radhika,
	Uhler, Mike

Here is the updated patch!  Thanks!

Regards,
Chao-ying Fu
MIPS Technologies, Inc.

Index: extend.texi
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/doc/extend.texi,v
retrieving revision 1.219
diff -c -3 -p -r1.219 extend.texi
*** extend.texi	23 Sep 2004 16:11:23 -0000	1.219
--- extend.texi	23 Sep 2004 23:42:23 -0000
*************** instructions, but allow the compiler to 
*** 5297,5302 ****
--- 5297,5303 ----
  * ARM Built-in Functions::
  * FR-V Built-in Functions::
  * X86 Built-in Functions::
+ * MIPS Paired-Single Floating Point Support::
  * PowerPC AltiVec Built-in Functions::
  @end menu
  
*************** v2sf __builtin_ia32_pswapdsf (v2sf)
*** 6180,6185 ****
--- 6181,6798 ----
  v2si __builtin_ia32_pswapdsi (v2si)
  @end smallexample
  
+ @node MIPS Paired-Single Floating Point Support
+ @subsection MIPS Paired-Single Floating Point Support
+ 
+ @menu
+ * Built-in Functions for MIPS64 Paired-Single Instructions::
+ * Built-in Functions for MIPS-3D ASE Instructions::
+ @end menu
+ 
+ The MIPS64 Architecture includes a number of paired-single floating point (FP) 
+ instructions.  These paired-single instructions operate on
+ 64-bit floating point registers containing two single floating point values
+ each in two contiguous 32-bits of the register, that is, one in the upper
+ half and one in the lower half.  This type of vector representation of two 
+ single FP values can then be operated upon simultaneously by a single 
+ instruction in a SIMD (single instruction multiple data) fashion. 
+ GCC supports the paired-single instructions via the @code{V2SF} machine mode, 
+ generic C arithmetic operations, and built-in functions.  Having this support 
+ allows a user to declare variables in C that use the new SIMD data type.  
+ When these variables are then used in arithmetic operations, the appropriate 
+ paired-single instructions are automatically generated by the compiler.  
+ Many built-in functions are also available that use this data type and
+ generate appropriate paired-single instructions.
+ 
+ To enable paired-single instruction support, the command line option 
+ @option{-mpaired-single} must be used.  Also, the hardware floating point 
+ option @option{-mhard-float} and the 64-bit FP register option 
+ @option{-mfp64} must be turned on either by default or by explicit command 
+ line options.
+ 
+ @smallexample
+ gcc -mips64 -mpaired-single -c hello.c
+ gcc -mips64 -mpaired-single -mhard-float -mfp64 -c hello.c
+ @end smallexample
+ 
+ To use paired-single variables in C, the following @code{typedef} is
+ required.
+ @smallexample
+ typedef float v2sf __attribute__ ((vector_size (8)));
+ @end smallexample
+ 
+ This @code{typedef} defines @code{v2sf} as an 8-byte data type which base type 
+ is @code{float} (4 bytes), so a @code{v2sf} variable contains two 
+ @code{float}s in a SIMD fashion.
+ 
+ The following illustrates by example, how SIMD variables can be declared,
+ initialized, and used in a C program.  Note that declaring and using SIMD 
+ variables in this way allows the compiler to use the appropriate SIMD 
+ instructions without any explicit direction from the user.
+ 
+ @table @asis
+ @item Variable Declaration
+ @smallexample
+ v2sf a, b, c, d;
+ /* @r{This declares four variables @code{a}, @code{b}, @code{c}, and @code{d} 
+    as a paired-single data type.}  */
+ @end smallexample
+ 
+ @item Variable Initialization
+ @smallexample
+ v2sf a = @{1.5, 9.1@};
+ v2sf b;
+ float e, f;
+ b = (v2sf) @{e, f@};
+ @end smallexample
+ 
+ @emph{Note:} The CPU endianness determines how paired-single variables are 
+ initialized, i.e., which value goes into the upper and which goes into the 
+ lower part of the paired-single floating point register.
+ For little-endian CPUs, the first single value goes into the lower part,
+ and the second single value goes into the upper part.  For example,
+ @code{v2sf a = @{1.5, 9.1@};} will put @code{1.5} into the lower part and 
+ @code{9.1} into the upper part.
+ For big-endian CPUs, the first single value goes into the upper part, and
+ the second single value goes into the lower part.  For the same example,
+ @code{v2sf a = @{1.5, 9.1@};} will put @code{1.5} into the upper part and 
+ @code{9.1} into the lower part.
+ @end table
+ 
+ The examples below illustrate the usage of the declared SIMD data type 
+ variables that allow the compiler to automatically invoke paired-single
+ instructions.  The instruction invoked in each case is shown in parentheses.
+ 
+ @table @asis
+ @item Assignment (@code{MOV.PS})
+ @smallexample
+ v2sf a, b;
+ a = b;
+ @end smallexample
+ 
+ @item Addition (@code{ADD.PS})
+ @smallexample
+ v2sf a, b, c;
+ a = b + c;
+ @end smallexample
+ 
+ @item Subtraction (@code{SUB.PS})
+ @smallexample
+ v2sf a, b, c;
+ a = b - c;
+ @end smallexample
+ 
+ @item Negation (@code{NEG.PS})
+ @smallexample
+ v2sf a, b;
+ a = - b;
+ @end smallexample
+ 
+ @item Multiplication (@code{MUL.PS})
+ @smallexample
+ v2sf a, b, c;
+ a = b * c;
+ @end smallexample
+ 
+ @item Multiplication and Addition (@code{MADD.PS})
+ @smallexample
+ v2sf a, b, c, d;
+ a = b * c + d;
+ @end smallexample
+ 
+ @item Multiplication and Subtraction (@code{MSUB.PS})
+ @smallexample
+ v2sf a, b, c, d;
+ a = b * c - d;
+ @end smallexample
+ 
+ @item Negation of Multiplication and Addition (@code{NMADD.PS})
+ @smallexample
+ v2sf a, b, c, d;
+ a = - (b * c + d);
+ @end smallexample
+ 
+ @item Negation of Multiplication and Subtraction (@code{NMSUB.PS})
+ @smallexample
+ v2sf a, b, c, d;
+ a = - (b * c - d);
+ @end smallexample
+ 
+ @item Conditional Move Based on Integer Comparison (@code{MOVN.PS}, @code{MOVZ.PS})
+ @smallexample
+ int i, j;
+ v2sf a, b, c;
+ a = (i > j) ? b : c;
+ /* @r{Or}  */
+ if (i > j)
+   a = b;
+ else
+   a = c;
+ @end smallexample
+ @end table
+ 
+ @node Built-in Functions for MIPS64 Paired-Single Instructions
+ @subsubsection Built-in Functions for MIPS64 Paired-Single Instructions 
+ 
+ Built-in functions can be used to explicitly invoke a particular SIMD 
+ instruction.  They are used in situations to merge paired-single variables,
+ convert between paired-single and float variables, calculate absolute
+ values, conditionally assign paired-single variables based on floating-point
+ comparison results, and compare two paired-single variables.
+ Typically, each built-in function refers to a particular paired-single SIMD
+ instruction (and other floating-point instructions if necessary).
+ 
+ @table @code
+ @item v2sf __builtin_mips_pll_ps (v2sf, v2sf)
+ Pair lower lower (@code{PLL.PS}).  
+ (Please refer to the architecture specification on the exact function of this 
+ and other paired-single instructions.)
+ 
+ In order to invoke the @code{PLL.PS} instruction on some paired-single 
+ variables, the user must do the following:  Declare the @code{v2sf} type 
+ shown previously, declare variables using that type, then call the built-in 
+ function on the appropriate variables.  The usage of other built-in functions 
+ is similar.
+ 
+ Example:
+ @smallexample
+ v2sf a, b, c;
+ c = __builtin_mips_pll_ps (a, b);
+ @end smallexample
+ 
+ @item v2sf __builtin_mips_pul_ps (v2sf, v2sf)
+ Pair upper lower (@code{PUL.PS}).
+ 
+ @item v2sf __builtin_mips_plu_ps (v2sf, v2sf)
+ Pair lower upper (@code{PLU.PS}).
+ 
+ @item v2sf __builtin_mips_puu_ps (v2sf, v2sf)
+ Pair upper upper (@code{PUU.PS}).
+ 
+ @item v2sf __builtin_mips_cvt_ps_s (float, float)
+ Floating point convert pair to paired single (@code{CVT.PS.S}).
+ 
+ @item float __builtin_mips_cvt_s_pl (v2sf)
+ Floating point convert pair lower to single floating point (@code{CVT.S.PL}).
+ 
+ @item float __builtin_mips_cvt_s_pu (v2sf)
+ Floating point convert pair upper to single floating point (@code{CVT.S.PU}).
+ 
+ @item v2sf __builtin_mips_abs_ps (v2sf)
+ Floating point absolute value (@code{ABS.PS}).
+ 
+ @item v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)
+ Floating point align variable (@code{ALNV.PS}).
+ 
+ @emph{Note:} The value of the third parameter @code{int} must be 0 or 4 
+ modulo 8, otherwise the result will be unpredictable.  Please read the 
+ instruction description for details.
+ 
+ @item v2sf __builtin_mips_mov@var{tf}_c_@var{cond}_ps (v2sf, v2sf, v2sf, v2sf)
+ Conditional move based on floating point comparison (@code{C.@var{cond}.PS}, 
+ @code{MOVT.PS}/@code{MOVF.PS}).
+ 
+ @var{tf} = @code{t}, @code{f}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using one 
+ of the 16 comparison operators specified.  Assign the third @code{v2sf} 
+ parameter to the destination, and then conditionally assign (if true or false) 
+ the fourth @code{v2sf} parameter to the destination, potentially overwriting
+ the previous assigned values.
+ 
+ @emph{Note:} The assignments of the upper and lower parts are independent and
+ based on their own comparison results.
+ 
+ Example:
+ @smallexample
+ v2sf a, b, c, d, e, f;
+ e = __builtin_mips_movt_c_eq_ps (a, b, c, d);
+ f = __builtin_mips_movf_c_eq_ps (a, b, c, d);
+ @end smallexample
+ 
+ @item int __builtin_mips_@var{choice}_c_@var{cond}_ps (v2sf, v2sf)
+ Floating point comparisons on two paired-single values (@code{C.@var{cond}.PS}, 
+ @code{BC1T}/@code{BC1F}).
+ 
+ @var{choice} = @code{upper}, @code{lower}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using one
+ of the 16 comparison operators specified.  Then return 1 if the specified upper
+ or lower comparison result is true, or return 0 if the specified upper
+ or lower comparison result is false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b;
+ if (__builtin_mips_upper_c_eq_ps (a, b))
+   upper_is_true ();
+ else
+   upper_is_false ();
+ 
+ if (__builtin_mips_lower_c_eq_ps (a, b))
+   lower_is_true ();
+ else
+   lower_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b;
+ int i, j;
+ i = __builtin_mips_upper_c_eq_ps (a, b);
+ if (i)
+   upper_is_true ();
+ else
+   upper_is_false ();
+ 
+ j = __builtin_mips_lower_c_eq_ps (a, b);
+ if (j)
+   lower_is_true ();
+ else
+   lower_is_false ();
+ @end smallexample
+ 
+ @end table
+ 
+ @node Built-in Functions for MIPS-3D ASE Instructions
+ @subsubsection Built-in Functions for MIPS-3D ASE Instructions
+ 
+ The MIPS-3D Application-Specific Extension (ASE) includes 13 floating point 
+ instructions designed to improve the performance of 3D graphics geometry 
+ operations.  GCC supports these instructions via built-in functions.  
+ For a description of these instructions, refer to the appropriate architecture 
+ reference manual.
+ 
+ To enable MIPS-3D support, the command line option @option{-mips3d} must be 
+ used.  Also, the hardware floating point option @option{-mhard-float}
+ and the 64-bit FP register option @option{-mfp64} must be turned on either by 
+ default or by explicit command line options.  Note that using @option{-mips3d}
+ implies @option{-mpaired-single}.
+ 
+ @smallexample
+ gcc -mips64 -mips3d -c hello.c
+ gcc -mips64 -mips3d -mhard-float -mfp64 -c hello.c
+ @end smallexample
+ 
+ The MIPS-3D built-in functions are as follows.
+ 
+ @table @code
+ @item v2sf __builtin_mips_addr_ps (v2sf, v2sf)
+ Floating point reduction add (@code{ADDR.PS}).
+ 
+ @item v2sf __builtin_mips_mulr_ps (v2sf, v2sf)
+ Floating point reduction multiply (@code{MULR.PS}).
+ 
+ @item v2sf __builtin_mips_cvt_pw_ps (v2sf)
+ Floating point convert paired single to paired word (@code{CVT.PW.PS}).
+ 
+ @item v2sf __builtin_mips_cvt_ps_pw (v2sf)
+ Floating point convert paired word to paired single (@code{CVT.PS.PW}).
+ 
+ @item float __builtin_mips_recip1_s (float)
+ Floating point reduced precision reciprocal (sequence step 1) (@code{RECIP1.S}).
+ 
+ @item double __builtin_mips_recip1_d (double)
+ Floating point reduced precision reciprocal (sequence step 1) (@code{RECIP1.D}).
+ 
+ @item v2sf __builtin_mips_recip1_ps (v2sf)
+ Floating point reduced precision reciprocal (sequence step 1) 
+ (@code{RECIP1.PS}).
+ 
+ @item float __builtin_mips_recip2_s (float, float)
+ Floating point reduced precision reciprocal (sequence step 2) (@code{RECIP2.S}).
+ 
+ @item double __builtin_mips_recip2_d (double, double)
+ Floating point reduced precision reciprocal (sequence step 2) (@code{RECIP2.D}).
+ 
+ @item v2sf __builtin_mips_recip2_ps (v2sf, v2sf)
+ Floating point reduced precision reciprocal (sequence step 2) 
+ (@code{RECIP2.PS}).
+ 
+ @item float __builtin_mips_rsqrt1_s (float)
+ Floating point reduced precision reciprocal square root (sequence step 1) 
+ (@code{RSQRT1.S}).
+ 
+ @item double __builtin_mips_rsqrt1_d (double)
+ Floating point reduced precision reciprocal square root (sequence step 1) 
+ (@code{RSQRT1.D}).
+ 
+ @item v2sf __builtin_mips_rsqrt1_ps (v2sf)
+ Floating point reduced precision reciprocal square root (sequence step 1) 
+ (@code{RSQRT1.PS}).
+ 
+ @item float __builtin_mips_rsqrt2_s (float, float)
+ Floating point reduced precision reciprocal square root (sequence step 2) 
+ (@code{RSQRT2.S}).
+ 
+ @item double __builtin_mips_rsqrt2_d (double, double)
+ Floating point reduced precision reciprocal square root (sequence step 2) 
+ (@code{RSQRT2.D}).
+ 
+ @item v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)
+ Floating point reduced precision reciprocal square root (sequence step 2) 
+ (@code{RSQRT2.PS}).
+ 
+ @item int __builtin_mips_@var{choice}_c_@var{cond}_ps (v2sf, v2sf)
+ Floating point comparisons on two paired-single values (@code{C.@var{cond}.PS}, 
+ @code{BC1ANY2T}/@code{BC1ANY2F}).
+ 
+ @var{choice} = @code{any}, @code{all}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using 
+ one of the 16 comparison operators specified.  For the @code{any} version,
+ then return 1 if any comparison result is true, or return 0 if all comparison 
+ results are false.  For the @code{all} version, then return 1 if all comparison
+ results are true, or return 0 if any comparison result is false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b;
+ if (__builtin_mips_any_c_eq_ps (a, b))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_c_eq_ps (a, b))
+   all_is_true ();
+ else
+   any_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b;
+ int i, j;
+ i = __builtin_mips_any_c_eq_ps (a, b);
+ j = __builtin_mips_all_c_eq_ps (a, b);
+ @end smallexample
+ 
+ @emph{Note:} The remaining built-in functions are similar to this function,
+ except for compare operators (normal or absolute), basic data types,
+ or using two or four consecutive conditional bits.
+ 
+ @item int __builtin_mips_@var{choice}_cabs_@var{cond}_ps (v2sf, v2sf)
+ Floating point absolute comparisons on two paired-single values 
+ (@code{CABS.@var{cond}.PS}, 
+ @code{BC1ANY2T}/@code{BC1ANY2F}/@code{BC1T}/@code{BC1F}).
+ 
+ @var{choice} = @code{any}, @code{all}, @code{upper}, @code{lower}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{v2sf} parameters 
+ using one of the 16 comparison operators specified.  Then return 1 if 
+ any results/all results/upper result/lower result are(is) true, or return 0 
+ if all results/any results/upper result/lower result are(is) false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b;
+ if (__builtin_mips_any_cabs_eq_ps (a, b))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_cabs_eq_ps (a, b))
+   all_is_true ();
+ else
+   any_is_false ();
+ 
+ if (__builtin_mips_upper_cabs_eq_ps (a, b))
+   upper_is_true ();
+ else
+   upper_is_false ();
+ 
+ if (__builtin_mips_lower_cabs_eq_ps (a, b))
+   lower_is_true ();
+ else
+   lower_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b;
+ int i, j, k, l;
+ i = __builtin_mips_any_cabs_eq_ps (a, b);
+ j = __builtin_mips_all_cabs_eq_ps (a, b);
+ k = __builtin_mips_upper_cabs_eq_ps (a, b);
+ l = __builtin_mips_lower_cabs_eq_ps (a, b);
+ @end smallexample
+ 
+ @item int __builtin_mips_cabs_@var{cond}_s (float, float)
+ Floating point absolute comparisons on single (@code{CABS.@var{cond}.S},
+ @code{BC1T}/@code{BC1F}).
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{float} parameters 
+ using one of the 16 comparison operators specified.  Then return 1 if true or 
+ return 0 if false.
+ 
+ Example 1:
+ @smallexample
+ float a, b;
+ if (__builtin_mips_cabs_eq_s (a, b))
+   true ();
+ else
+   false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ float a, b;
+ int i;
+ i = __builtin_mips_cabs_eq_s (a, b);
+ @end smallexample
+ 
+ @item int __builtin_mips_cabs_@var{cond}_d (double, double)
+ Floating point absolute comparisons on double (@code{CABS.@var{cond}.D},
+ @code{BC1T}/@code{BC1F}).
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{double} parameters
+ using one of the 16 comparison operators specified.  Then return 1 if true or 
+ return 0 if false.
+ 
+ Example 1:
+ @smallexample
+ double a, b;
+ if (__builtin_mips_cabs_eq_d (a, b))
+   true ();
+ else
+   false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ double a, b;
+ int i;
+ i = __builtin_mips_cabs_eq_d (a, b);
+ @end smallexample
+ 
+ @item v2sf __builtin_mips_mov@var{tf}_cabs_@var{cond}_ps (v2sf, v2sf, v2sf, v2sf)
+ Conditional move based on floating point absolute comparison 
+ (@code{CABS.@var{cond}.PS}, @code{MOVT.PS}/@code{MOVF.PS}).
+ 
+ @var{tf} = @code{t}, @code{f}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{v2sf} parameters 
+ using one of the 16 comparison operators specified.  Assign the third
+ @code{v2sf} parameter to the destination, and then conditionally assign (if 
+ true or false) the fourth @code{v2sf} parameter to the destination,
+ potentially overwriting the previous assigned values.
+ 
+ @emph{Note:} The assignments of the upper and lower parts are independent and 
+ based on their own comparison results.
+ 
+ Example:
+ @smallexample
+ v2sf a, b, c, d, e, f;
+ e = __builtin_mips_movt_cabs_eq_ps (a, b, c, d);
+ f = __builtin_mips_movf_cabs_eq_ps (a, b, c, d);
+ @end smallexample
+ 
+ @item int __builtin_mips_@var{choice}_c_@var{cond}_4s (v2sf, v2sf, v2sf, v2sf)
+ Floating point comparisons on four paired-single values 
+ (@code{C.@var{cond}.PS}, @code{BC1ANY4T}/@code{BC1ANY4F}).
+ 
+ @var{choice} = @code{any}, @code{all}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using one 
+ of the 16 comparison operators specified.  Compare the third and the fourth 
+ @code{v2sf} parameters using one of the 16 comparison operators specified.  
+ Then return 1 if any/all comparison results are true, or return 0 
+ if all/any comparison results are false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b, c, d;
+ if (__builtin_mips_any_c_eq_4s (a, b, c, d))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_c_eq_4s (a, b, c, d))
+   all_is_true ();
+ else
+   any_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b, c, d;
+ int i, j;
+ i = __builtin_mips_any_c_eq_4s (a, b, c, d);
+ j = __builtin_mips_all_c_eq_4s (a, b, c, d);
+ @end smallexample
+ 
+ @item int __builtin_mips_@var{choice}_cabs_@var{cond}_4s (v2sf, v2sf, v2sf, v2sf)
+ Floating point absolute comparisons on four paired-single values 
+ (@code{CABS.@var{cond}.PS}, @code{BC1ANY4T}/@code{BC1ANY4F}).
+ 
+ @var{choice} = @code{any}, @code{all}
+ 
+ @var{cond} = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{v2sf} parameters 
+ using one of the 16 comparison operators specified.  Absolute compare the 
+ third and the fourth @code{v2sf} parameters using one of the 16 comparison 
+ operators specified.  Then return 1 if any/all comparison results 
+ are true, or return 0 if all/any comparison results are false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b, c, d;
+ if (__builtin_mips_any_cabs_eq_4s (a, b, c, d))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_cabs_eq_4s (a, b, c, d))
+   all_is_true ();
+ else
+   any_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b, c, d;
+ int i, j;
+ i = __builtin_mips_any_cabs_eq_4s (a, b, c, d);
+ j = __builtin_mips_all_cabs_eq_4s (a, b, c, d);
+ @end smallexample
+ 
+ @end table
+ 
  @node PowerPC AltiVec Built-in Functions
  @subsection PowerPC AltiVec Built-in Functions
  

> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org
> [mailto:gcc-patches-owner@gcc.gnu.org]On Behalf Of Richard Sandiford
> Sent: Tuesday, September 21, 2004 11:49 PM
> To: Fu, Chao-Ying
> Cc: James E Wilson; gcc-patches@gcc.gnu.org; Stephens, Nigel; 
> Thekkath,
> Radhika; Uhler, Mike
> Subject: Re: [patch] extend.texi MIPS PS/3D Support
> 
> 
> This is awesome.  Thanks a lot for doing this.
> 
> Some very minor niggles:
> 
> "Fu, Chao-Ying" <fu@mips.com> writes:
> > + * MIPS Paired-Single Floating Point Instruction Support::
> 
> Maybe drop "Instruction"?
> 
> > + @menu
> > + * Built-in Functions for MIPS64 Paired-Single Instructions::
> > + * Built-in Functions for MIPS-3D ASE Instructions::
> > + @end menu
> 
> I'm not sure how canonical it is to have the section start with a menu
> and be followed by a lengthy (but very good!) overview.  It might well
> be OK, but maybe a docs maintainer can comment.
> 
> Perhaps a lot of the overview could go in a subsection of its own,
> alongside the two nodes above.
> 
> > + The MIPS64 Architecture includes a number of 
> paired-single floating point (FP) 
> > + instructions.  These paired-single instructions operate on
> > + 64-bit floating point registers containing two single 
> floating point values
> > + each in two contiguous 32-bits of the register, that is, 
> one in the upper
> > + half and one in the lower half.  This type of vector 
> representation of two 
> > + single FP values can then be operated upon simultaneously 
> by a single 
> > + instruction in a SIMD (single instruction multiple data) 
> fashion, also called 
> > + paired-single instructions in the MIPS sentence.  GCC 
> supports the 
>                                   ^^^^^^^^^^^^^^^^^
> I think you mean "MIPS terminology", or something like that.  Although
> everything after "also called..." is a little redundant since you've
> already introduced the term "paired-single instructions".
> 
> > + To enable paired-single instruction support, the command 
> line option 
> > + @option{-mpaired-single} must be used.  Also, the 
> hardware floating point 
> > + option @option{-mhard-float} and the 64-bit FP register option 
> > + @option{-mfp64} must be turned on either by default or by 
> explicit command 
> > + line options.
> > + 
> > + @smallexample
> > + gcc -mips64 -mpaired-single -c hello.c
> > + gcc -mips64 -mpaired-single -mhard-float -mfp64 -c hello.c
> > + @end smallexample
> > + 
> > + To use paired-single variables in C, the following 
> @code{typedef} is
> > + required.
> > + @smallexample
> > + typedef float v2sf __attribute__ ((vector_size (8)));
> > + @end smallexample
> > + 
> > + This @code{typedef} defines @code{v2sf} as an 8-byte data 
> type which base type 
> > + is @code{float} (4 bytes), so a @code{v2sf} variable contains two 
> > + @code{float}s in a SIMD fashion.
> > + 
> > + The following illustrates by example, how SIMD variables 
> can be declared,
> > + initialized, and used in a C program.  Note that 
> declaring and using SIMD 
> > + variables in this way allows the compiler to use the 
> appropriate SIMD 
> > + instructions without any explicit direction from the user.
> > + 
> > + @table @asis
> > + @item Variable Declaration
> > + @smallexample
> > + v2sf a, b, c, d;
> > + /* @r{This declares four variables a, b, c, and d as a 
> paired-single data type.}  */
> 
> I suspect that this should reall be "@code{a}, @code{b}, ...".
> 
> > + @end smallexample
> > + 
> > + @item Variable Initialization
> > + @smallexample
> > + v2sf a = @{1.5, 9.1@};
> > + v2sf b;
> > + float e, f;
> > + b = (v2sf) @{e, f@};
> > + @end smallexample
> > + 
> > + NOTE: The CPU endianness determines how paired-single 
> variables are initialized,
> 
> I think this should be @emph{Note:}.
> 
> > + i.e., which value goes into the upper and which goes into 
> the lower part
> > + of the paired-single floating point register.
> > + For little-endian CPUs, the first single value goes into 
> the lower part,
> > + and the second single value goes into the upper part.  
> For example,
> > + @code{v2sf a = @{1.5, 9.1@};}, @code{1.5} goes into the 
> lower part and 
> > + @code{9.1} goes into the upper part.
> 
> How about:
> 
>     For example, @code{v2sf a = @{1.5, 9.1@};} will put 
> @code{1.5} into
>     the lower part and @code{9.1} into the upper part.
> 
> > + The examples below illustrate the usage of the declared 
> SIMD data type 
> > + variables that allow the compiler to automatically invoke 
> paired-single
> > + instructions.  The instruction invoked in each case is 
> shown in parentheses.
> 
> The first sentence doesn't sound quite right, but I can't think of
> anything better right now.
> 
> > + 
> > + @table @asis
> > + @item Assignment (MOV.PS)
> 
> Maybe better to use "(@code{mov.ps})", here and elsewhere?
> 
> > + @item Conditional Move Based on Integer Comparison 
> (MOVN.PS, MOVZ.PS)
> > + @smallexample
> > + int i, j;
> > + v2sf a, b, c;
> > + a = (i > j) ? b : c;
> > + /* Or */
> > + if (i > j)
> > +   a = b;
> > + else
> > +   a = c;
> > + @end smallexample
> > + @end table
> 
> Apparently that should be "@r{Or}".  So many things to remember... ;)
> 
> > + @node Built-in Functions for MIPS64 Paired-Single Instructions
> > + @subsubsection Built-in Functions for MIPS64 
> Paired-Single Instructions 
> > + 
> > + Built-in functions invoke explicit SIMD instructions by 
> the user in C.
> 
> Maybe something like "Built-in functions can be used to explicitly
> invoke a particular SIMD instruction"?
> 
> > + They are used in situations when merging paired-single variables,
>                   ^^^^^^^^^^^^^^^^^^^^^^^^^^
> Suggest "to merge" (with rest of sentence changing accordingly).
> 
> > + NOTE: The value of the third parameter @code{int} must be 0 or 4 
> 
> Another @emph{Note:}.
> 
> > + @item v2sf __builtin_mips_mov*_c_*_ps (v2sf, v2sf, v2sf, v2sf)
> > + Conditional move based on floating point comparison 
> (C.*.PS, MOVT.PS/MOVF.PS).
> > + 
> > + The first * = @code{t}, @code{f}
> > + 
> > + The second * = @code{f}, @code{un}, @code{eq}, 
> @code{ueq}, @code{olt}, 
> > + @code{ult}, @code{ole}, @code{ule}, @code{sf}, 
> @code{ngle}, @code{seq}, 
> > + @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
> 
> Probably better to use @var{...} instead of "*" here.  E.g.:
> 
> __builtin_mips_mov@var{tf}_c_@var{cond}_ps
> 
> Richard
> 

^ permalink raw reply	[flat|nested] 36+ messages in thread
* RE: [patch] extend.texi MIPS PS/3D Support
@ 2004-09-22 22:13 Fu, Chao-Ying
  0 siblings, 0 replies; 36+ messages in thread
From: Fu, Chao-Ying @ 2004-09-22 22:13 UTC (permalink / raw)
  To: Devang Patel, Giovanni Bajo
  Cc: Gerald Pfeifer, dorit, Stephens, Nigel, Thekkath, Radhika, Uhler,
	Mike, Jim Wilson, gcc-patches

For MIPS machines, we can put the following.

/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-stats -mips64 -mpaired-single -mhard-float -mfp64" { 
target mipsisa64*-*-* } } */

Regards,
Chao-ying Fu
MIPS Technologies, Inc.

-----Original Message-----
From: gcc-patches-owner@gcc.gnu.org
[mailto:gcc-patches-owner@gcc.gnu.org]On Behalf Of Devang Patel
Sent: Tuesday, September 21, 2004 6:48 PM
To: Giovanni Bajo
Cc: Fu, Chao-Ying; Gerald Pfeifer; dorit@il.ibm.com; Stephens, Nigel;
Thekkath, Radhika; Uhler, Mike; Jim Wilson; gcc-patches@gcc.gnu.org
Subject: Re: [patch] extend.texi MIPS PS/3D Support



On Sep 21, 2004, at 6:33 PM, Giovanni Bajo wrote:

> Does MIPS PS/3D work also with the autovectorizer?

Autovectorizer checks if required vector instruction is supported by 
target or not. I am not familiar with MIPS PS/3D but if vector insns 
match then why not? It would be good idea to update vectorization tests 
for other vector architectures. Right now each tests contain following 
powerpc and x68 specific options setting.

/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-stats -maltivec" 
{ target powerpc*-*-* } } */
/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-stats -msse2" { 
target i?86-*-* x86_64-*-* } } */


-
Devang

^ permalink raw reply	[flat|nested] 36+ messages in thread
* RE: [patch] extend.texi MIPS PS/3D Support
@ 2004-09-22 22:05 Fu, Chao-Ying
  2004-09-23 17:40 ` Richard Sandiford
  0 siblings, 1 reply; 36+ messages in thread
From: Fu, Chao-Ying @ 2004-09-22 22:05 UTC (permalink / raw)
  To: Dorit Naishlos, Giovanni Bajo, gcc-patches
  Cc: dpatel, Gerald Pfeifer, Stephens, Nigel, Thekkath, Radhika,
	Uhler, Mike, Jim Wilson

Ok.  We need to put this into "mips.h".  Thanks!

Regards,
Chao-ying Fu
MIPS Technolgoies, Inc.

Index: mips.h
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.370
diff -c -3 -p -r1.370 mips.h
*** mips.h	18 Sep 2004 19:19:37 -0000	1.370
--- mips.h	22 Sep 2004 21:07:30 -0000
*************** extern const struct mips_cpu_info *mips_
*** 243,248 ****
--- 243,250 ----
  				((target_flags & MASK_PAIRED_SINGLE) != 0)
  #define TARGET_MIPS3D		((target_flags & MASK_MIPS3D) != 0)
  
+ #define UNITS_PER_SIMD_WORD	(TARGET_PAIRED_SINGLE_FLOAT ? 8 : 0)
+ 
  /* True if we should use NewABI-style relocation operators for
     symbolic addresses.  This is never true for mips16 code,
     which has its own conventions.  */

-----Original Message-----
From: Dorit Naishlos [mailto:DORIT@il.ibm.com]
Sent: Wednesday, September 22, 2004 2:34 AM
To: Giovanni Bajo
Cc: dpatel@apple.com; Fu, Chao-Ying; gcc-patches@gcc.gnu.org; Gerald
Pfeifer; Stephens, Nigel; Thekkath, Radhika; Uhler, Mike; Jim Wilson
Subject: Re: [patch] extend.texi MIPS PS/3D Support



> Does MIPS PS/3D work also with the autovectorizer?

It should, if you define UNITS_PER_SIMD_WORD.

dorit




                                                                                                                                   
                      "Giovanni Bajo"                                                                                              
                      <giovannibajo@lib        To:       "Fu, Chao-Ying" <fu@mips.com>, "Gerald Pfeifer" <gerald@pfeifer.com>,     
                      ero.it>                   <dpatel@apple.com>, Dorit Naishlos/Haifa/IBM@IBMIL                                 
                                               cc:       <nigel@mercury.mips.com>, <radhika@mercury.mips.com>,                     
                      22/09/2004 03:33          <uhler@mercury.mips.com>, "Jim Wilson" <wilson@specifixinc.com>,                   
                                                <gcc-patches@gcc.gnu.org>                                                          
                                               Subject:  Re: [patch] extend.texi MIPS PS/3D Support                                
                                                                                                                                   




Fu, Chao-Ying wrote:

> Hi Jim,
>
> Thanks for your feedback!  Here is the updated patc    h.
> (I forgot to send my first email to gcc-patches.  This time should be
> ok.)

Thanks for writing this up. Would you please prepare also a patch to
http://gcc.gnu.org/gcc-4.0/changes.html mentioning this change? Moreover,
if
Gerald agrees, I think we could mention the PS/3D support in the front page
too
(http://gcc.gnu.org/news.html).

Does MIPS PS/3D work also with the autovectorizer?

Giovanni Bajo





^ permalink raw reply	[flat|nested] 36+ messages in thread
* RE: [patch] extend.texi MIPS PS/3D Support
@ 2004-09-22  0:21 Fu, Chao-Ying
  2004-09-22  2:46 ` Giovanni Bajo
  2004-09-22  8:53 ` Richard Sandiford
  0 siblings, 2 replies; 36+ messages in thread
From: Fu, Chao-Ying @ 2004-09-22  0:21 UTC (permalink / raw)
  To: James E Wilson, gcc-patches
  Cc: Stephens, Nigel, Thekkath, Radhika, Uhler, Mike

Hi Jim,

Thanks for your feedback!  Here is the updated patch.
(I forgot to send my first email to gcc-patches.  This time should be ok.)

Chao-ying Fu
MIPS Technologies, Inc.

Index: doc/extend.texi
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/doc/extend.texi,v
retrieving revision 1.218
diff -c -3 -p -r1.218 extend.texi
*** doc/extend.texi	17 Sep 2004 17:24:17 -0000	1.218
--- doc/extend.texi	21 Sep 2004 23:39:44 -0000
*************** instructions, but allow the compiler to 
*** 5295,5300 ****
--- 5295,5301 ----
  * ARM Built-in Functions::
  * FR-V Built-in Functions::
  * X86 Built-in Functions::
+ * MIPS Paired-Single Floating Point Instruction Support::
  * PowerPC AltiVec Built-in Functions::
  @end menu
  
*************** v2sf __builtin_ia32_pswapdsf (v2sf)
*** 6178,6183 ****
--- 6179,6776 ----
  v2si __builtin_ia32_pswapdsi (v2si)
  @end smallexample
  
+ @node MIPS Paired-Single Floating Point Instruction Support
+ @subsection MIPS Paired-Single Floating Point Instruction Support
+ 
+ @menu
+ * Built-in Functions for MIPS64 Paired-Single Instructions::
+ * Built-in Functions for MIPS-3D ASE Instructions::
+ @end menu
+ 
+ The MIPS64 Architecture includes a number of paired-single floating point (FP) 
+ instructions.  These paired-single instructions operate on
+ 64-bit floating point registers containing two single floating point values
+ each in two contiguous 32-bits of the register, that is, one in the upper
+ half and one in the lower half.  This type of vector representation of two 
+ single FP values can then be operated upon simultaneously by a single 
+ instruction in a SIMD (single instruction multiple data) fashion, also called 
+ paired-single instructions in the MIPS sentence.  GCC supports the 
+ paired-single instructions via the @code{V2SF} machine mode, 
+ generic C arithmetic operations, and built-in functions.  Having this support 
+ allows a user to declare variables in C that use the new SIMD data type.  
+ When these variables are then used in arithmetic operations, the appropriate 
+ paired-single instructions are automatically generated by the compiler.  
+ Many built-in functions are also available that use this data type and
+ generate appropriate paired-single instructions.
+ 
+ To enable paired-single instruction support, the command line option 
+ @option{-mpaired-single} must be used.  Also, the hardware floating point 
+ option @option{-mhard-float} and the 64-bit FP register option 
+ @option{-mfp64} must be turned on either by default or by explicit command 
+ line options.
+ 
+ @smallexample
+ gcc -mips64 -mpaired-single -c hello.c
+ gcc -mips64 -mpaired-single -mhard-float -mfp64 -c hello.c
+ @end smallexample
+ 
+ To use paired-single variables in C, the following @code{typedef} is
+ required.
+ @smallexample
+ typedef float v2sf __attribute__ ((vector_size (8)));
+ @end smallexample
+ 
+ This @code{typedef} defines @code{v2sf} as an 8-byte data type which base type 
+ is @code{float} (4 bytes), so a @code{v2sf} variable contains two 
+ @code{float}s in a SIMD fashion.
+ 
+ The following illustrates by example, how SIMD variables can be declared,
+ initialized, and used in a C program.  Note that declaring and using SIMD 
+ variables in this way allows the compiler to use the appropriate SIMD 
+ instructions without any explicit direction from the user.
+ 
+ @table @asis
+ @item Variable Declaration
+ @smallexample
+ v2sf a, b, c, d;
+ /* @r{This declares four variables a, b, c, and d as a paired-single data type.}  */
+ @end smallexample
+ 
+ @item Variable Initialization
+ @smallexample
+ v2sf a = @{1.5, 9.1@};
+ v2sf b;
+ float e, f;
+ b = (v2sf) @{e, f@};
+ @end smallexample
+ 
+ NOTE: The CPU endianness determines how paired-single variables are initialized,
+ i.e., which value goes into the upper and which goes into the lower part
+ of the paired-single floating point register.
+ For little-endian CPUs, the first single value goes into the lower part,
+ and the second single value goes into the upper part.  For example,
+ @code{v2sf a = @{1.5, 9.1@};}, @code{1.5} goes into the lower part and 
+ @code{9.1} goes into the upper part.
+ For big-endian CPUs, the first single value goes into the upper part, and
+ the second single value goes into the lower part.  For the same example,
+ @code{v2sf a = @{1.5, 9.1@};}, @code{1.5} goes into the upper and @code{9.1} 
+ goes into the lower part.
+ @end table
+ 
+ The examples below illustrate the usage of the declared SIMD data type 
+ variables that allow the compiler to automatically invoke paired-single
+ instructions.  The instruction invoked in each case is shown in parentheses.
+ 
+ @table @asis
+ @item Assignment (MOV.PS)
+ @smallexample
+ v2sf a, b;
+ a = b;
+ @end smallexample
+ 
+ @item Addition (ADD.PS)
+ @smallexample
+ v2sf a, b, c;
+ a = b + c;
+ @end smallexample
+ 
+ @item Subtraction (SUB.PS)
+ @smallexample
+ v2sf a, b, c;
+ a = b - c;
+ @end smallexample
+ 
+ @item Negation (NEG.PS)
+ @smallexample
+ v2sf a, b;
+ a = - b;
+ @end smallexample
+ 
+ @item Multiplication (MUL.PS)
+ @smallexample
+ v2sf a, b, c;
+ a = b * c;
+ @end smallexample
+ 
+ @item Multiplication and Addition (MADD.PS)
+ @smallexample
+ v2sf a, b, c, d;
+ a = b * c + d;
+ @end smallexample
+ 
+ @item Multiplication and Subtraction (MSUB.PS)
+ @smallexample
+ v2sf a, b, c, d;
+ a = b * c - d;
+ @end smallexample
+ 
+ @item Negation of Multiplication and Addition (NMADD.PS)
+ @smallexample
+ v2sf a, b, c, d;
+ a = - (b * c + d);
+ @end smallexample
+ 
+ @item Negation of Multiplication and Subtraction (NMSUB.PS)
+ @smallexample
+ v2sf a, b, c, d;
+ a = - (b * c - d);
+ @end smallexample
+ 
+ @item Conditional Move Based on Integer Comparison (MOVN.PS, MOVZ.PS)
+ @smallexample
+ int i, j;
+ v2sf a, b, c;
+ a = (i > j) ? b : c;
+ /* Or */
+ if (i > j)
+   a = b;
+ else
+   a = c;
+ @end smallexample
+ @end table
+ 
+ @node Built-in Functions for MIPS64 Paired-Single Instructions
+ @subsubsection Built-in Functions for MIPS64 Paired-Single Instructions 
+ 
+ Built-in functions invoke explicit SIMD instructions by the user in C.
+ They are used in situations when merging paired-single variables,
+ converting between paired-single and float variables, calculating absolute
+ values, conditionally assigning paired-single variables based on floating-point
+ comparison results, and comparing two paired-single variables.
+ Typically, each built-in function refers to a particular paired-single SIMD
+ instruction (and other floating-point instructions if necessary).
+ 
+ @table @code
+ @item v2sf __builtin_mips_pll_ps (v2sf, v2sf)
+ Pair lower lower (PLL.PS).  
+ (Please refer to the architecture specification on the exact function of this 
+ and other paired-single instructions.)
+ 
+ In order to invoke the PLL.PS instruction on some paired-single variables,
+ the user must do the following:  Declare the @code{v2sf} type shown previously,
+ declare variables using that type, then call the built-in function on the 
+ appropriate variables.  The usage of other built-in functions is similar.
+ 
+ @item v2sf __builtin_mips_pul_ps (v2sf, v2sf)
+ Pair upper lower (PUL.PS).
+ 
+ @item v2sf __builtin_mips_plu_ps (v2sf, v2sf)
+ Pair lower upper (PLU.PS).
+ 
+ @item v2sf __builtin_mips_puu_ps (v2sf, v2sf)
+ Pair upper upper (PUU.PS).
+ 
+ @item v2sf __builtin_mips_cvt_ps_s (float, float)
+ Floating point convert pair to paired single (CVT.PS.S).
+ 
+ @item float __builtin_mips_cvt_s_pl (v2sf)
+ Floating point convert pair lower to single floating point (CVT.S.PL).
+ 
+ @item float __builtin_mips_cvt_s_pu (v2sf)
+ Floating point convert pair upper to single floating point (CVT.S.PU).
+ 
+ @item v2sf __builtin_mips_abs_ps (v2sf)
+ Floating point absolute value (ABS.PS).
+ 
+ @item v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)
+ Floating point align variable (ALNV.PS).
+ 
+ NOTE: The value of the third parameter @code{int} must be 0 or 4 
+ modulo 8, otherwise the result will be unpredictable.  Please read the 
+ instruction description for details.
+ 
+ @item v2sf __builtin_mips_mov*_c_*_ps (v2sf, v2sf, v2sf, v2sf)
+ Conditional move based on floating point comparison (C.*.PS, MOVT.PS/MOVF.PS).
+ 
+ The first * = @code{t}, @code{f}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using one 
+ of the 16 comparison operators specified.  Assign the third @code{v2sf} 
+ parameter to the destination, and then conditionally assign (if true or false) 
+ the fourth @code{v2sf} parameter to the destination, potentially overwriting
+ the previous assigned values.
+ 
+ NOTE: The assignments of the upper and lower parts are independent and
+ based on their own comparison results.
+ 
+ Example:
+ @smallexample
+ v2sf a, b, c, d, e, f;
+ e = __builtin_mips_movt_c_eq_ps (a, b, c, d);
+ f = __builtin_mips_movf_c_eq_ps (a, b, c, d);
+ @end smallexample
+ 
+ @item int __builtin_mips_*_c_*_ps(v2sf, v2sf)
+ Floating point comparisons on two paired-single values (C.*.PS, BC1T/BC1F).
+ 
+ The first * = @code{upper}, @code{lower}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using one
+ of the 16 comparison operators specified.  Then return 1 if the specified upper
+ or lower comparison result is true, or return 0 if the specified upper
+ or lower comparison result is false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b;
+ if (__builtin_mips_upper_c_eq_ps (a, b))
+   upper_is_true ();
+ else
+   upper_is_false ();
+ 
+ if (__builtin_mips_lower_c_eq_ps (a, b))
+   lower_is_true ();
+ else
+   lower_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b;
+ int i, j;
+ i = __builtin_mips_upper_c_eq_ps (a, b);
+ if (i)
+   upper_is_true ();
+ else
+   upper_is_false ();
+ 
+ j = __builtin_mips_lower_c_eq_ps (a, b);
+ if (j)
+   lower_is_true ();
+ else
+   lower_is_false ();
+ @end smallexample
+ 
+ @end table
+ 
+ @node Built-in Functions for MIPS-3D ASE Instructions
+ @subsubsection Built-in Functions for MIPS-3D ASE Instructions
+ 
+ The MIPS-3D Application-Specific Extension (ASE) includes 13 floating point 
+ instructions designed to improve the performance of 3D graphics geometry 
+ operations.  GCC supports these instructions via built-in functions.  
+ For a description of these instructions, refer to the appropriate architecture 
+ reference manual.
+ 
+ To enable MIPS-3D support, the command line option @option{-mips3d} must be 
+ used.  Also, the hardware floating point option @option{-mhard-float}
+ and the 64-bit FP register option @option{-mfp64} must be turned on either by 
+ default or by explicit command line options.  Note that using @option{-mips3d}
+ implies @option{-mpaired-single}.
+ 
+ @smallexample
+ gcc -mips64 -mips3d -c hello.c
+ gcc -mips64 -mips3d -mhard-float -mfp64 -c hello.c
+ @end smallexample
+ 
+ The MIPS-3D built-in functions are as follows.
+ 
+ @table @code
+ @item v2sf __builtin_mips_addr_ps (v2sf, v2sf)
+ Floating point reduction add (ADDR.PS).
+ 
+ @item v2sf __builtin_mips_mulr_ps (v2sf, v2sf)
+ Floating point reduction multiply (MULR.PS).
+ 
+ @item v2sf __builtin_mips_cvt_pw_ps (v2sf)
+ Floating point convert paired single to paired word (CVT.PW.PS).
+ 
+ @item v2sf __builtin_mips_cvt_ps_pw (v2sf)
+ Floating point convert paired word to paired single (CVT.PS.PW).
+ 
+ @item float __builtin_mips_recip1_s (float)
+ Floating point reduced precision reciprocal (sequence step 1) (RECIP1.S).
+ 
+ @item double __builtin_mips_recip1_d (double)
+ Floating point reduced precision reciprocal (sequence step 1) (RECIP1.D).
+ 
+ @item v2sf __builtin_mips_recip1_ps (v2sf)
+ Floating point reduced precision reciprocal (sequence step 1) (RECIP1.PS).
+ 
+ @item float __builtin_mips_recip2_s (float, float)
+ Floating point reduced precision reciprocal (sequence step 2) (RECIP2.S).
+ 
+ @item double __builtin_mips_recip2_d (double, double)
+ Floating point reduced precision reciprocal (sequence step 2) (RECIP2.D).
+ 
+ @item v2sf __builtin_mips_recip2_ps (v2sf, v2sf)
+ Floating point reduced precision reciprocal (sequence step 2) (RECIP2.PS).
+ 
+ @item float __builtin_mips_rsqrt1_s (float)
+ Floating point reduced precision reciprocal square root (sequence step 1) (RSQRT1.S).
+ 
+ @item double __builtin_mips_rsqrt1_d (double)
+ Floating point reduced precision reciprocal square root (sequence step 1) (RSQRT1.D).
+ 
+ @item v2sf __builtin_mips_rsqrt1_ps (v2sf)
+ Floating point reduced precision reciprocal square root (sequence step 1) (RSQRT1.PS).
+ 
+ @item float __builtin_mips_rsqrt2_s (float, float)
+ Floating point reduced precision reciprocal square root (sequence step 2) (RSQRT2.S).
+ 
+ @item double __builtin_mips_rsqrt2_d (double, double)
+ Floating point reduced precision reciprocal square root (sequence step 2) (RSQRT2.D).
+ 
+ @item v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)
+ Floating point reduced precision reciprocal square root (sequence step 2) (RSQRT2.PS).
+ 
+ @item int __builtin_mips_*_c_*_ps(v2sf, v2sf)
+ Floating point comparisons on two paired-single values (C.*.PS, 
+ BC1ANY2T/BC1ANY2F).
+ 
+ The first * = @code{any}, @code{all}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using 
+ one of the 16 comparison operators specified.  For the @code{any} version,
+ then return 1 if any comparison result is true, or return 0 if all comparison 
+ results are false.  For the @code{all} version, then return 1 if all comparison
+ results are true, or return 0 if any comparison result is false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b;
+ if (__builtin_mips_any_c_eq_ps (a, b))
+   any_is_true();
+ else
+   all_is_false();
+ 
+ if (__builtin_mips_all_c_eq_ps (a, b))
+   all_is_true();
+ else
+   any_is_false();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b;
+ int i, j;
+ i = __builtin_mips_any_c_eq_ps (a, b);
+ j = __builtin_mips_all_c_eq_ps (a, b);
+ @end smallexample
+ 
+ NOTE: The remaining built-in functions are similar to this function,
+ except for compare operators (normal or absolute), basic data types,
+ or using two or four consecutive conditional bits.
+ 
+ @item int __builtin_mips_*_cabs_*_ps(v2sf, v2sf)
+ Floating point absolute comparisons on two paired-single values (CABS.*.PS, 
+ BC1ANY2T/BC1ANY2F/BC1T/BC1F).
+ 
+ The first * = @code{any}, @code{all}, @code{upper}, @code{lower}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{v2sf} parameters 
+ using one of the 16 comparison operators specified.  Then return 1 if 
+ any results/all results/upper result/lower result are(is) true, or return 0 
+ if all results/any results/upper result/lower result are(is) false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b;
+ if (__builtin_mips_any_cabs_eq_ps (a, b))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_cabs_eq_ps (a, b))
+   all_is_true ();
+ else
+   any_is_false ();
+ 
+ if (__builtin_mips_upper_cabs_eq_ps (a, b))
+   upper_is_true ();
+ else
+   upper_is_false ();
+ 
+ if (__builtin_mips_lower_cabs_eq_ps (a, b))
+   lower_is_true ();
+ else
+   lower_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b;
+ int i, j, k, l;
+ i = __builtin_mips_any_cabs_eq_ps (a, b);
+ j = __builtin_mips_all_cabs_eq_ps (a, b);
+ k = __builtin_mips_upper_cabs_eq_ps (a, b);
+ l = __builtin_mips_lower_cabs_eq_ps (a, b);
+ @end smallexample
+ 
+ @item int __builtin_mips_cabs_*_s (float, float)
+ Floating point absolute comparisons on single (CABS.*.S).
+ 
+ * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{float} parameters 
+ using one of the 16 comparison operators specified.  Then return 1 if true or 
+ return 0 if false.
+ 
+ Example 1:
+ @smallexample
+ float a, b;
+ if (__builtin_mips_cabs_eq_s (a, b))
+   true ();
+ else
+   false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ float a, b;
+ int i;
+ i = __builtin_mips_cabs_eq_s (a, b);
+ @end smallexample
+ 
+ @item int __builtin_mips_cabs_*_d(double, double)
+ Floating point absolute comparisons on double (CABS.*.D).
+ 
+ * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{double} parameters
+ using one of the 16 comparison operators specified.  Then return 1 if true or 
+ return 0 if false.
+ 
+ Example 1:
+ @smallexample
+ double a, b;
+ if (__builtin_mips_cabs_eq_d (a, b))
+   true ();
+ else
+   false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ double a, b;
+ int i;
+ i = __builtin_mips_cabs_eq_d (a, b);
+ @end smallexample
+ 
+ @item v2sf __builtin_mips_mov*_cabs_*_ps (v2sf, v2sf, v2sf, v2sf)
+ Conditional move based on floating point absolute comparison (CABS.*.PS, 
+ MOVT.PS/MOVF.PS).
+ 
+ The first * = @code{t}, @code{f}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{v2sf} parameters 
+ using one of the 16 comparison operators specified.  Assign the third
+ @code{v2sf} parameter to the destination, and then conditionally assign (if 
+ true or false) the fourth @code{v2sf} parameter to the destination,
+ potentially overwriting the previous assigned values.
+ 
+ NOTE: The assignments of the upper and lower parts are independent and based
+       on their own comparison results.
+ 
+ Example:
+ @smallexample
+ v2sf a, b, c, d, e, f;
+ e = __builtin_mips_movt_cabs_eq_ps (a, b, c, d);
+ f = __builtin_mips_movf_cabs_eq_ps (a, b, c, d);
+ @end smallexample
+ 
+ @item int __builtin_mips_*_c_*_4s(v2sf, v2sf, v2sf, v2sf)
+ Floating point comparisons on four paired-single values (C.*.PS, 
+ BC1ANY4T/BC1ANY4F).
+ 
+ The first * = @code{any}, @code{all}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Compare the first and the second @code{v2sf} parameters using one 
+ of the 16 comparison operators specified.  Compare the third and the fourth 
+ @code{v2sf} parameters using one of the 16 comparison operators specified.  
+ Then return 1 if any/all comparison results are true, or return 0 
+ if all/any comparison results are false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b, c, d;
+ if (__builtin_mips_any_c_eq_4s (a, b, c, d))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_c_eq_4s (a, b, c, d))
+   all_is_true ();
+ else
+   any_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b, c, d;
+ int i, j;
+ i = __builtin_mips_any_c_eq_4s (a, b, c, d);
+ j = __builtin_mips_all_c_eq_4s (a, b, c, d);
+ @end smallexample
+ 
+ @item int __builtin_mips_*_cabs_*_4s(v2sf, v2sf, v2sf, v2sf)
+ Floating point absolute comparisons on four paired-single values (CABS.*.PS, 
+ BC1ANY4T/BC1ANY4F).
+ 
+ The first * = @code{any}, @code{all}
+ 
+ The second * = @code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, 
+ @code{ult}, @code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, 
+ @code{ngl}, @code{lt}, @code{nge}, @code{le}, @code{ngt}
+ 
+ Description: Absolute compare the first and the second @code{v2sf} parameters 
+ using one of the 16 comparison operators specified.  Absolute compare the 
+ third and the fourth @code{v2sf} parameters using one of the 16 comparison 
+ operators specified.  Then return 1 if any/all comparison results 
+ are true, or return 0 if all/any comparison results are false.
+ 
+ Example 1:
+ @smallexample
+ v2sf a, b, c, d;
+ if (__builtin_mips_any_cabs_eq_4s (a, b, c, d))
+   any_is_true ();
+ else
+   all_is_false ();
+ 
+ if (__builtin_mips_all_cabs_eq_4s (a, b, c, d))
+   all_is_true ();
+ else
+   any_is_false ();
+ @end smallexample
+ 
+ Example 2:
+ @smallexample
+ v2sf a, b, c, d;
+ int i, j;
+ i = __builtin_mips_any_cabs_eq_4s (a, b, c, d);
+ j = __builtin_mips_all_cabs_eq_4s (a, b, c, d);
+ @end smallexample
+ 
+ @end table
+ 
  @node PowerPC AltiVec Built-in Functions
  @subsection PowerPC AltiVec Built-in Functions
  



-----Original Message-----
From: James E Wilson [mailto:wilson@specifixinc.com]
Sent: Tuesday, September 21, 2004 3:20 PM
To: Fu, Chao-Ying
Cc: Stephens, Nigel; Thekkath, Radhika; Uhler, Mike
Subject: Re: [patch] extend.texi MIPS PS/3D Support


This needs to be sent to the gcc-patches mailing list if it hasn't
already.  Eric Christopher and/or Richard Sandiford will likely want to
comment on it.

Improving the docs is one of the things I am still on the hook for, so
I'm glad to see that you are helping out here.

I got sick over the weekend, so I may not be very responsive for a
little while.  I've only skimmed through this.  It looks pretty
reasonable to me, but I am a poor judge of what Richard wants.

The text for the -mpaired-single and -mips3d options could be improved
to mention that they enable built-in functions.

The first hunk of the patch doesn't mention Built-in Functions, which
looks a little odd next to all of the others Built-in Functions list,
but I see the next menu down has the PS and MIPS-3D Built-in Functions,
so it seems reasonable.  Though others may disagree.  We won't know
until you post it.

The sentence
"includes several paired-single floating point (FP) instructions"
looks odd to me, as there are more than several such instructions. 
Maybe "a number of" instead of "several".

"Gcc supports the paired-single instructions via a new SIMD data type
@code{v2sf}."
There is no such data type.  The user must create one via a typedef, and
the user can give it any name.

"Note that declaring and using SIMD variables in this way allow the
compiler..."
Should be allows not allow.

"as a paired-single data type. */"
Should be two spaces after a period as per GNU coding conventions.

The "Variable Declaration", "Variable Initialization", "Assignment", etc
stuff looks strange by itself.  Maybe use @table/@item/@end here to give
it some structure?

There is no mention of the SB-1 extensions, but I don't expect you to
write that up.  I can add that on top of your docs after your docs get
approved and installed.
-- 
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com


^ permalink raw reply	[flat|nested] 36+ messages in thread
end of thread, other threads:[~2004-10-26 13:39 UTC | newest]

Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2004-09-23 18:02 [patch] extend.texi MIPS PS/3D Support Fu, Chao-Ying
2004-09-24 12:17 ` Dorit Naishlos
2004-09-24 21:35   ` Chao-ying Fu
2004-09-25 10:53     ` Richard Sandiford
2004-09-27 23:32       ` Chao-ying Fu
2004-09-28  0:32         ` Dorit Naishlos
2004-09-28  0:41           ` Richard Henderson
2004-09-28 14:07             ` Dorit Naishlos
2004-09-28 14:08               ` Paolo Bonzini
2004-09-29 11:41                 ` Paolo Bonzini
2004-09-29 17:33                   ` Richard Henderson
2004-09-29 23:39                   ` Dorit Naishlos
2004-10-11 22:48                   ` [patch] vectorizer: fix handling of non VECTOR_MODE_P vectypes Dorit Naishlos
2004-10-12  0:40                     ` Richard Henderson
2004-10-12 12:54                       ` Dorit Naishlos
2004-10-12 16:37                         ` Richard Henderson
2004-10-12 18:21                           ` Dorit Naishlos
2004-10-12 20:49                             ` James A. Morrison
2004-10-13  8:46                               ` Dorit Naishlos
2004-10-13 19:18                         ` Richard Henderson
2004-09-28 19:35               ` [patch] extend.texi MIPS PS/3D Support Chao-ying Fu
2004-09-28 23:04               ` Richard Henderson
  -- strict thread matches above, loose matches on Subject: below --
2004-09-24  0:12 Fu, Chao-Ying
2004-10-02 11:35 ` Richard Sandiford
2004-10-05  7:15   ` Richard Sandiford
2004-09-22 22:13 Fu, Chao-Ying
2004-09-22 22:05 Fu, Chao-Ying
2004-09-23 17:40 ` Richard Sandiford
2004-09-22  0:21 Fu, Chao-Ying
2004-09-22  2:46 ` Giovanni Bajo
2004-09-22  3:14   ` Devang Patel
2004-09-22 11:24     ` Dorit Naishlos
2004-09-22  7:36   ` Richard Sandiford
2004-09-22 11:06   ` Dorit Naishlos
2004-10-26 14:29   ` Gerald Pfeifer
2004-09-22  8:53 ` Richard Sandiford

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