From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15882 invoked by alias); 17 May 2007 11:15:58 -0000 Received: (qmail 15869 invoked by uid 22791); 17 May 2007 11:15:57 -0000 X-Spam-Check-By: sourceware.org Received: from pfepc.post.tele.dk (HELO pfepc.post.tele.dk) (195.41.46.237) by sourceware.org (qpsmtpd/0.31) with ESMTP; Thu, 17 May 2007 11:15:54 +0000 Received: from x1-6-00-0f-9f-c6-3e-90 (x1-6-00-0f-9f-c6-3e-90.k75.webspeed.dk [80.197.1.215]) by pfepc.post.tele.dk (Postfix) with ESMTP id 229108A002D; Thu, 17 May 2007 13:15:51 +0200 (CEST) Received: from x1-6-00-0f-9f-c6-3e-90 (localhost.localdomain [127.0.0.1]) by x1-6-00-0f-9f-c6-3e-90 (8.14.0/8.14.0) with ESMTP id l4HBFoNq010624; Thu, 17 May 2007 13:15:50 +0200 Received: (from rask@localhost) by x1-6-00-0f-9f-c6-3e-90 (8.14.0/8.14.0/Submit) id l4HBFnnk010623; Thu, 17 May 2007 13:15:49 +0200 Date: Thu, 17 May 2007 11:15:00 -0000 From: Rask Ingemann Lambertsen To: Uros Bizjak Cc: Paolo Bonzini , Chris Lattner , GCC Patches Subject: Re: [PATCH, x86_64]: Provide longlong.h definitions for 128bit operations Message-ID: <20070517111548.GX5690@sygehus.dk> References: <464B6834.1050600@gmail.com> <1A602E70-5AEE-4B36-A8A3-7BC18F16E708@apple.com> <5787cf470705162257q218a370dwaa99b4dd918a0edf@mail.gmail.com> <1E575F91-1967-4AB6-9D29-A8360BC6C8A2@apple.com> <464C02B4.2010107@gnu.org> <5787cf470705170225v72e50971r9296da4a06093ac7@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5787cf470705170225v72e50971r9296da4a06093ac7@mail.gmail.com> User-Agent: Mutt/1.5.14 (2007-02-12) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2007-05/txt/msg01123.txt.bz2 On Thu, May 17, 2007 at 11:25:34AM +0200, Uros Bizjak wrote: > Unfortunatelly, this approach confuses gcc a lot. Attached testcase > will illustrate the problem on i686 (substitute SI with DI and DI with > TI on 64bit and change shift values for the same result): [snip] > Compared two approaches head-to-head on i686 target; gcc -O2 > -fomit-frame-pointer generates: > > test_c: > subl $28, %esp #, > xorl %edx, %edx # > movl 40(%esp), %eax # c, tmp66 > movl 44(%esp), %ecx # d, d > movl %esi, 20(%esp) #, > movl %ebx, 16(%esp) #, > movl %eax, %edx # tmp66, > movl $0, %eax #, tmp66 > movl %eax, %esi #, tmp74 > movl 32(%esp), %eax # a, tmp70 > movl %edx, %ebx # tmp75, __c > orl %ecx, %esi # d, tmp74 > xorl %edx, %edx # > movl %esi, %ecx # tmp74, __c > movl 36(%esp), %esi # b, b > movl %edi, 24(%esp) #, > movl 24(%esp), %edi #, > movl %eax, %edx # tmp70, > movl $0, %eax #, tmp70 > orl %esi, %eax # b, tmp72 > movl 20(%esp), %esi #, > addl %eax, %ecx # tmp72, __c > adcl %edx, %ebx #, __c > movl %ecx, 8(%esp) # __c, y > movl %ebx, %ecx # __c, __c > xorl %ebx, %ebx # __c > movl 16(%esp), %ebx #, > movl %ecx, 12(%esp) # __c, x > addl $28, %esp #, > ret You must be running into some sort of target specific problem, because x86 16-bit -O2 -fno-omit-frame-pointer gets test_c: pushw %cx ;# 62 *pushhi1 pushw %di ;# 63 *pushhi1 enterw $6-2, $0 ;# 64 _enter movw 14(%bp),%ax ;# 18 *movhi/1 movw 12(%bp),%di ;# 19 *movhi/1 movw 10(%bp),%dx ;# 30 *movhi/1 movw 8(%bp), %cx ;# 31 *movhi/1 addw %dx, %ax ;# 56 _addhi3_cc_for_carry/1 movw %di, %dx ;# 61 *movhi/1 adcw %cx, %dx ;# 57 _addhi3_carry/1 movw %ax, -4(%bp) ;# 35 *movhi/2 movw %dx, -2(%bp) ;# 40 *movhi/2 leavew ;# 67 _leave popw %di ;# 68 *pophi1 popw %cx ;# 69 *pophi1 ret ;# 70 *return with the obvious s/SI/HI/, S/DI/SI/, etc. changes to your testcase. While the above could be improved a little, notice the complete absence of "or" and "xor" instructions. (Why do you have both "movl $0, %reg" and "xorl %reg, %reg"?) -- Rask Ingemann Lambertsen 741 unexpected failures, and counting...