Re: New back end ia16: 16-bit Intel x86

[Rask Ingemann Lambertsen <rask@sygehus.dk>]

On Sat, Aug 18, 2007 at 04:39:32PM -0400, Ross Ridge wrote:
> Rask Ingemann Lambertsen writes:
> >It is not different in your case! You're targetting the i386, so you
> >can use i386 addressing modes at just the cost of a 0x67 prefix
> 
> You also need to add the cost zero extending the 16-bit pointer values to
> 32-bits, so using 32-bit addressing modes will only rarely be worthwhile.

   Daniel and Peter have modelled the 32-bit registers with separate top and
bottom halves to be able to keep track of when the top half has been
touched. With that in place, they can set the top half to zero every time
they need it that way and if the top half was unmodified from the last time
they did so, the instruction to clear the top half should be optimized away
automatically. The advantage of being able to use %ax, %cx and %dx as
base registers only begins to show up with more than 3 pointer variables
live at the same time. I don't know if that happens frequently or not.

   The see pass should also be able to optimize away zero extensions, but I
hear it has bitrotted to the point of not being usable. It also works only
on pseudo registers.

-- 
Rask Ingemann Lambertsen