From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15728 invoked by alias); 10 Oct 2007 11:59:52 -0000 Received: (qmail 15718 invoked by uid 22791); 10 Oct 2007 11:59:50 -0000 X-Spam-Check-By: sourceware.org Received: from gateway.codesourcery.com (HELO sparrowhawk.codesourcery.com) (65.74.133.9) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 10 Oct 2007 11:59:46 +0000 Received: from sparrowhawk.codesourcery.com (localhost.localdomain [127.0.0.1]) by sparrowhawk.codesourcery.com (8.13.1/8.13.1) with ESMTP id l9ABxiTQ030898; Wed, 10 Oct 2007 04:59:44 -0700 Received: (from kazu@localhost) by sparrowhawk.codesourcery.com (8.13.1/8.13.1/Submit) id l9ABxid1030895; Wed, 10 Oct 2007 04:59:44 -0700 Date: Wed, 10 Oct 2007 11:59:00 -0000 Message-Id: <200710101159.l9ABxid1030895@sparrowhawk.codesourcery.com> From: Kazu Hirata To: gcc-patches@gcc.gnu.org CC: schwab@suse.de Subject: [patch] m68k: Revert my ASSEMBLER_DIALECT patches. X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2007-10/txt/msg00549.txt.bz2 Hi, Attached is a patch to revert three patches of mine related to ASSEMBLER_DIALECT. On m68k, people use '{' and '}' in bitfield instructions. One person told me on IRC that Linux kernel uses one of those instructions. Since ASSEMBLER_DIALECT uses '{' and '}' as special characters to describe dialects, my patches broke backward compatibility. This patch reverts my ASSEMBLER_DIALECT. Too bad. Committed as obvious. Kazu Hirata 2007-10-10 Kazu Hirata Revert: 2007-10-09 Kazu Hirata * longlong.h (count_leading_zeros): Replace '{' and '}' with '%{' and '%}', respectively. Revert: 2007-10-09 Kazu Hirata * config/m68k/m68k.c (print_operand): Handle '{' and '}'. * config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '{' and '}'. * config/m68k/m68k.md: Replace '{' with '%{' where '{' is meant to be output. Revert: 2007-10-07 Kazu Hirata * config/m68k/m68k.c, config/m68k/m68k.md: Use the assembly syntax for ASSEMBLER_DIALECT. * config/m68k/m68k.h (ASSEMBLER_DIALECT): New. Index: gcc/config/m68k/m68k.c =================================================================== --- gcc/config/m68k/m68k.c (revision 129201) +++ gcc/config/m68k/m68k.c (working copy) @@ -3375,8 +3375,8 @@ output_addsi3 (rtx *operands) && (INTVAL (operands[2]) < -32768 || INTVAL (operands[2]) > 32767)) return "move%.l %2,%0\n\tadd%.l %1,%0"; if (GET_CODE (operands[2]) == REG) - return "lea {(%1,%2.l)|%1@(0,%2:l)},%0"; - return "lea {(%c2,%1)|%1@(%c2)},%0"; + return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0"; + return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0"; } if (GET_CODE (operands[2]) == CONST_INT) { @@ -3414,7 +3414,7 @@ output_addsi3 (rtx *operands) if (TUNE_68040) return "add%.w %2,%0"; else - return "lea {(%c2,%0)|%0@(%c2)},%0"; + return MOTOROLA ? "lea (%c2,%0),%0" : "lea %0@(%c2),%0"; } } return "add%.l %2,%0"; @@ -3710,8 +3710,6 @@ floating_exact_log2 (rtx x) '&' for the letter `d' in an op code, but only on the 68040. '/' for register prefix needed by longlong.h. '?' for m68k_library_id_string - '{' for '{' - '}' for '}' 'b' for byte insn (no effect, on the Sun; this is for the ISI). 'd' to force memory addressing to be absolute, not relative. @@ -3729,18 +3727,14 @@ print_operand (FILE *file, rtx op, int l if (MOTOROLA) fprintf (file, "."); } - else if (letter == '{') - fprintf (file, "{"); - else if (letter == '}') - fprintf (file, "}"); else if (letter == '#') asm_fprintf (file, "%I"); else if (letter == '-') - asm_fprintf (file, "{-(%Rsp)|%Rsp@-}"); + asm_fprintf (file, MOTOROLA ? "-(%Rsp)" : "%Rsp@-"); else if (letter == '+') - asm_fprintf (file, "{(%Rsp)+|%Rsp@+}"); + asm_fprintf (file, MOTOROLA ? "(%Rsp)+" : "%Rsp@+"); else if (letter == '@') - asm_fprintf (file, "{(%Rsp)|%Rsp@}"); + asm_fprintf (file, MOTOROLA ? "(%Rsp)" : "%Rsp@"); else if (letter == '!') asm_fprintf (file, "%Rfpcr"); else if (letter == '$') @@ -3780,7 +3774,7 @@ print_operand (FILE *file, rtx op, int l && !(GET_CODE (XEXP (op, 0)) == CONST_INT && INTVAL (XEXP (op, 0)) < 0x8000 && INTVAL (XEXP (op, 0)) >= -0x8000)) - asm_fprintf (file, "{.|:}l"); + fprintf (file, MOTOROLA ? ".l" : ":l"); } else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == SFmode) { @@ -3840,11 +3834,11 @@ print_operand_address (FILE *file, rtx a gcc_unreachable (); if (address.code == PRE_DEC) - asm_fprintf (file, "{-(%s)|%s@-}", - M68K_REGNAME (REGNO (address.base))); + fprintf (file, MOTOROLA ? "-(%s)" : "%s@-", + M68K_REGNAME (REGNO (address.base))); else if (address.code == POST_INC) - asm_fprintf (file, "{(%s)+|%s@+}", - M68K_REGNAME (REGNO (address.base))); + fprintf (file, MOTOROLA ? "(%s)+" : "%s@+", + M68K_REGNAME (REGNO (address.base))); else if (!address.base && !address.index) { /* A constant address. */ @@ -3853,7 +3847,7 @@ print_operand_address (FILE *file, rtx a { /* (xxx).w or (xxx).l. */ if (IN_RANGE (INTVAL (addr), -0x8000, 0x7fff)) - asm_fprintf (file, "%d{.|:}w", (int) INTVAL (addr)); + fprintf (file, MOTOROLA ? "%d.w" : "%d:w", (int) INTVAL (addr)); else fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); } Index: gcc/config/m68k/m68k.h =================================================================== --- gcc/config/m68k/m68k.h (revision 129201) +++ gcc/config/m68k/m68k.h (working copy) @@ -29,10 +29,6 @@ along with GCC; see the file COPYING3. # define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)") #endif -/* Options 0 and 1 are the Motorola and MIT syntaxes, - respectively. */ -#define ASSEMBLER_DIALECT !MOTOROLA - /* Handle --with-cpu default option from configure script. */ #define OPTION_DEFAULT_SPECS \ { "cpu", "%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:\ @@ -975,11 +971,17 @@ do { if (cc_prev_status.flags & CC_IN_68 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM)) -#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ - asm_fprintf (FILE, "\tmove%.l %s,{-(%Rsp)|%Rsp@-}\n", reg_names[REGNO]) +#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ + asm_fprintf (FILE, (MOTOROLA \ + ? "\tmove.l %s,-(%Rsp)\n" \ + : "\tmovel %s,%Rsp@-\n"), \ + reg_names[REGNO]) -#define ASM_OUTPUT_REG_POP(FILE,REGNO) \ - asm_fprintf (FILE, "\tmove%.l {(%Rsp)+|%Rsp@+},%s\n", reg_names[REGNO]) +#define ASM_OUTPUT_REG_POP(FILE,REGNO) \ + asm_fprintf (FILE, (MOTOROLA \ + ? "\tmove.l (%Rsp)+,%s\n" \ + : "\tmovel %Rsp@+,%s\n"), \ + reg_names[REGNO]) /* The m68k does not use absolute case-vectors, but we must define this macro anyway. */ @@ -1057,8 +1059,6 @@ do { if (cc_prev_status.flags & CC_IN_68 '&' for the letter `d' in an op code, but only on the 68040. '/' for register prefix needed by longlong.h. '?' for m68k_library_id_string - '{' for '{' - '}' for '}' 'b' for byte insn (no effect, on the Sun; this is for the ISI). 'd' to force memory addressing to be absolute, not relative. @@ -1069,8 +1069,7 @@ do { if (cc_prev_status.flags & CC_IN_68 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \ - || (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?' \ - || (CODE) == '{' || (CODE) == '}') + || (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?') /* See m68k.c for the m68k specific codes. */ Index: gcc/config/m68k/m68k.md =================================================================== --- gcc/config/m68k/m68k.md (revision 129201) +++ gcc/config/m68k/m68k.md (working copy) @@ -825,7 +825,7 @@ (define_insn "*movsi_const0_68040_60" "TUNE_68040_60" { if (which_alternative == 0) - return "lea 0{.|:}w,%0"; + return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0"; else if (which_alternative == 1) return "clr%.l %0"; else @@ -1140,7 +1140,7 @@ (define_insn "" { /* On the '040, 'subl an,an' takes 2 clocks while lea takes only 1 */ if (TUNE_68040_60) - return "lea 0{.|:}w,%0"; + return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0"; else return "sub%.l %0,%0"; } @@ -2444,13 +2444,13 @@ (define_insn_and_split "*addsi3_5200" return "#"; case 5: - return "lea {(%1,%2.l)|%1@(0,%2:l)},%0"; + return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0"; case 6: - return "lea {(%2,%1.l)|%2@(0,%1:l)},%0"; + return MOTOROLA ? "lea (%2,%1.l),%0" : "lea %2@(0,%1:l),%0"; case 7: - return "lea {(%c2,%1)|%1@(%c2)},%0"; + return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0"; default: gcc_unreachable (); @@ -2521,7 +2521,7 @@ (define_insn "addhi3" } } if (ADDRESS_REG_P (operands[0]) && !TUNE_68040) - return "lea {(%c2,%0)|%0@(%c2)},%0"; + return MOTOROLA ? "lea (%c2,%0),%0" : "lea %0@(%c2),%0"; } return "add%.w %2,%0"; }) @@ -2576,7 +2576,7 @@ (define_insn "" } } if (ADDRESS_REG_P (operands[0]) && !TUNE_68040) - return "lea {(%c1,%0)|%0@(%c1)},%0"; + return MOTOROLA ? "lea (%c1,%0),%0" : "lea %0@(%c1),%0"; } return "add%.w %1,%0"; }) @@ -2625,7 +2625,7 @@ (define_insn "" } } if (ADDRESS_REG_P (operands[0]) && !TUNE_68040) - return "lea {(%c1,%0)|%0@(%c1)},%0"; + return MOTOROLA ? "lea (%c1,%0),%0" : "lea %0@(%c1),%0"; } return "add%.w %1,%0"; }) @@ -2971,7 +2971,9 @@ (define_insn "mulhi3" (mult:HI (match_operand:HI 1 "general_operand" "%0") (match_operand:HI 2 "general_src_operand" "dmSn")))] "" - "muls{.w} %2,%0" +{ + return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0"; +} [(set_attr "type" "muls_w") (set_attr "opy" "2")]) @@ -2982,7 +2984,9 @@ (define_insn "mulhisi3" (sign_extend:SI (match_operand:HI 2 "nonimmediate_src_operand" "dmS"))))] "" - "muls{.w} %2,%0" +{ + return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0"; +} [(set_attr "type" "muls_w") (set_attr "opy" "2")]) @@ -2992,7 +2996,9 @@ (define_insn "*mulhisisi3_s" (match_operand:HI 1 "nonimmediate_operand" "%0")) (match_operand:SI 2 "const_int_operand" "n")))] "INTVAL (operands[2]) >= -0x8000 && INTVAL (operands[2]) <= 0x7fff" - "muls{.w} %2,%0" +{ + return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0"; +} [(set_attr "type" "muls_w") (set_attr "opy" "2")]) @@ -3029,7 +3035,9 @@ (define_insn "umulhisi3" (zero_extend:SI (match_operand:HI 2 "nonimmediate_src_operand" "dmS"))))] "" - "mulu{.w} %2,%0" +{ + return MOTOROLA ? "mulu%.w %2,%0" : "mulu %2,%0"; +} [(set_attr "type" "mulu_w") (set_attr "opy" "2")]) @@ -3039,7 +3047,9 @@ (define_insn "*mulhisisi3_z" (match_operand:HI 1 "nonimmediate_operand" "%0")) (match_operand:SI 2 "const_int_operand" "n")))] "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 0xffff" - "mulu{.w} %2,%0" +{ + return MOTOROLA ? "mulu%.w %2,%0" : "mulu %2,%0"; +} [(set_attr "type" "mulu_w") (set_attr "opy" "2")]) @@ -3462,7 +3472,10 @@ (define_insn "divmodhi4" (mod:HI (match_dup 1) (match_dup 2)))] "!TARGET_COLDFIRE || TARGET_CF_HWDIV" { - output_asm_insn ("ext%.l %0\;divs{.w} %2,%0", operands); + output_asm_insn (MOTOROLA ? + "ext%.l %0\;divs%.w %2,%0" : + "extl %0\;divs %2,%0", + operands); if (!find_reg_note(insn, REG_UNUSED, operands[3])) { CC_STATUS_INIT; @@ -3481,9 +3494,15 @@ (define_insn "udivmodhi4" "!TARGET_COLDFIRE || TARGET_CF_HWDIV" { if (ISA_HAS_MVS_MVZ) - output_asm_insn ("mvz%.w %0,%0\;divu{.w} %2,%0", operands); + output_asm_insn (MOTOROLA ? + "mvz%.w %0,%0\;divu%.w %2,%0" : + "mvz%.w %0,%0\;divu %2,%0", + operands); else - output_asm_insn ("and%.l #0xFFFF,%0\;divu{.w} %2,%0", operands); + output_asm_insn (MOTOROLA ? + "and%.l #0xFFFF,%0\;divu%.w %2,%0" : + "and%.l #0xFFFF,%0\;divu %2,%0", + operands); if (!find_reg_note(insn, REG_UNUSED, operands[3])) { @@ -5487,7 +5506,7 @@ (define_insn "" if (REG_P (operands[0])) { if (INTVAL (operands[1]) + INTVAL (operands[2]) != 32) - return "bfins %3,%0%{%b2:%b1%}"; + return "bfins %3,%0{%b2:%b1}"; } else operands[0] = adjust_address (operands[0], @@ -5542,7 +5561,7 @@ (define_insn "" if (REG_P (operands[1])) { if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32) - return "bfextu %1%{%b3:%b2%},%0"; + return "bfextu %1{%b3:%b2},%0"; } else operands[1] @@ -5595,7 +5614,7 @@ (define_insn "" if (REG_P (operands[1])) { if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32) - return "bfexts %1%{%b3:%b2%},%0"; + return "bfexts %1{%b3:%b2},%0"; } else operands[1] @@ -5626,7 +5645,7 @@ (define_insn "" (match_operand:SI 2 "nonmemory_operand" "dn") (match_operand:SI 3 "nonmemory_operand" "dn")))] "TARGET_68020 && TARGET_BITFIELD" - "bfexts %1%{%b3:%b2%},%0") + "bfexts %1{%b3:%b2},%0") (define_expand "extzv" [(set (match_operand:SI 0 "register_operand" "") @@ -5652,7 +5671,7 @@ (define_insn "" { CC_STATUS_INIT; } - return "bfextu %1%{%b3:%b2%},%0"; + return "bfextu %1{%b3:%b2},%0"; }) (define_insn "" @@ -5667,7 +5686,7 @@ (define_insn "" && (~ INTVAL (operands[3]) & ((1 << INTVAL (operands[1]))- 1)) == 0))" { CC_STATUS_INIT; - return "bfchg %0%{%b2:%b1%}"; + return "bfchg %0{%b2:%b1}"; }) (define_insn "" @@ -5678,7 +5697,7 @@ (define_insn "" "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfclr %0%{%b2:%b1%}"; + return "bfclr %0{%b2:%b1}"; }) (define_insn "" @@ -5689,7 +5708,7 @@ (define_insn "" "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfset %0%{%b2:%b1%}"; + return "bfset %0{%b2:%b1}"; }) (define_expand "insv" @@ -5706,7 +5725,7 @@ (define_insn "" (match_operand:SI 2 "nonmemory_operand" "dn")) (match_operand:SI 3 "register_operand" "d"))] "TARGET_68020 && TARGET_BITFIELD" - "bfins %3,%0%{%b2:%b1%}") + "bfins %3,%0{%b2:%b1}") ;; Now recognize bit-field insns that operate on registers ;; (or at least were intended to do so). @@ -5717,7 +5736,7 @@ (define_insn "" (match_operand:SI 2 "const_int_operand" "n") (match_operand:SI 3 "const_int_operand" "n")))] "TARGET_68020 && TARGET_BITFIELD" - "bfexts %1%{%b3:%b2%},%0") + "bfexts %1{%b3:%b2},%0") (define_insn "" [(set (match_operand:SI 0 "nonimmediate_operand" "=d") @@ -5735,7 +5754,7 @@ (define_insn "" { CC_STATUS_INIT; } - return "bfextu %1%{%b3:%b2%},%0"; + return "bfextu %1{%b3:%b2},%0"; }) (define_insn "" @@ -5746,7 +5765,7 @@ (define_insn "" "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfclr %0%{%b2:%b1%}"; + return "bfclr %0{%b2:%b1}"; }) (define_insn "" @@ -5757,7 +5776,7 @@ (define_insn "" "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfset %0%{%b2:%b1%}"; + return "bfset %0{%b2:%b1}"; }) (define_insn "" @@ -5776,7 +5795,7 @@ (define_insn "" && INTVAL (operands[1]) == 24 && INTVAL (operands[2]) == 8) return "move%.b %3,%0"; #endif - return "bfins %3,%0%{%b2:%b1%}"; + return "bfins %3,%0{%b2:%b1}"; }) ;; Special patterns for optimizing bit-field instructions. @@ -5801,7 +5820,7 @@ (define_insn "" } if (INTVAL (operands[1]) != 32) cc_status.flags = CC_NOT_NEGATIVE; - return "bftst %0%{%b2:%b1%}"; + return "bftst %0{%b2:%b1}"; }) @@ -5825,7 +5844,7 @@ (define_insn "" } if (INTVAL (operands[1]) != 32) cc_status.flags = CC_NOT_NEGATIVE; - return "bftst %0%{%b2:%b1%}"; + return "bftst %0{%b2:%b1}"; }) (define_insn "scc0_di" @@ -6813,7 +6832,9 @@ (define_insn "*tablejump_internal" [(set (pc) (match_operand:SI 0 "register_operand" "a")) (use (label_ref (match_operand 1 "" "")))] "" - "jmp {(%0)|%0@}" +{ + return MOTOROLA ? "jmp (%0)" : "jmp %0@"; +} [(set_attr "type" "bra")]) ;; Jump to variable address from dispatch table of relative addresses. @@ -6830,12 +6851,14 @@ (define_insn "" if (TARGET_COLDFIRE) { if (ADDRESS_REG_P (operands[0])) - return "jmp {(2,pc,%0.l)|pc@(2,%0:l)}"; + return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)"; + else if (MOTOROLA) + return "ext%.l %0\;jmp (2,pc,%0.l)"; else - return "ext%.l %0\;jmp {(2,pc,%0.l)|pc@(2,%0:l)}"; + return "extl %0\;jmp pc@(2,%0:l)"; } else - return "jmp {(2,pc,%0.w)|pc@(2,%0:w)}"; + return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)"; #endif }) @@ -7202,10 +7225,12 @@ (define_insn "*link" "TARGET_68020 || INTVAL (operands[1]) >= -0x8004" { operands[1] = GEN_INT (INTVAL (operands[1]) + 4); - if (INTVAL (operands[1]) >= -0x8000) - return "link{.w} %0,%1"; + if (!MOTOROLA) + return "link %0,%1"; + else if (INTVAL (operands[1]) >= -0x8000) + return "link.w %0,%1"; else - return "link{.l} %0,%1"; + return "link.l %0,%1"; }) (define_expand "unlink" @@ -7238,7 +7263,7 @@ (define_insn "load_got" if (TARGET_ID_SHARED_LIBRARY) { operands[1] = gen_rtx_REG (Pmode, PIC_REG); - return "move%.l {%?(%1)|%1@(%?)},%0"; + return MOTOROLA ? "move.l %?(%1),%0" : "movel %1@(%?), %0"; } else if (MOTOROLA) { Index: gcc/longlong.h =================================================================== --- gcc/longlong.h (revision 129201) +++ gcc/longlong.h (working copy) @@ -553,7 +553,7 @@ UDItype __umulsidi3 (USItype, USItype); cpu32 disguises as a 68020, but lacks them. */ #if defined (__mc68020__) && !defined (__mcpu32__) #define count_leading_zeros(count, x) \ - __asm__ ("bfffo %1%{%b2:%b2%},%0" \ + __asm__ ("bfffo %1{%b2:%b2},%0" \ : "=d" ((USItype) (count)) \ : "od" ((USItype) (x)), "n" (0)) /* Some ColdFire architectures have a ff1 instruction supported via