* Re: [PATCH,SH] Add SH2A new instructions 3/6
@ 2007-10-25 12:46 Naveen H.S.
2007-10-30 1:38 ` Kaz Kojima
0 siblings, 1 reply; 3+ messages in thread
From: Naveen H.S. @ 2007-10-25 12:46 UTC (permalink / raw)
To: Kaz Kojima; +Cc: gcc-patches, Anil Paranjape, Prafulla Thakare
[-- Attachment #1: Type: text/plain, Size: 806 bytes --]
Hi,
Please find attached the modified patch "sh2a3.patch". This patch
implements
new instruction PREFETCH for SH2A target.
ChangeLog
2007-10-25 Mukesh Srivastava <mukesh.srivastava@kpitcummins.com>
* config/sh/sh.md (prefetch): Add condition for SH2A target.
(prefetch_sh2a): New.
Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Free download of GNU based tool-chains for Renesas' SH, H8, R8C, M16C
and M32C Series. The following site also offers free technical support
to its users. Visit http://www.kpitgnutools.com for details.
Latest versions of KPIT GNU tools were released on October 1, 2007.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[-- Attachment #2: sh2a3.patch --]
[-- Type: application/octet-stream, Size: 2476 bytes --]
diff -upr gcc-4.3-20070921/gcc/config/sh/sh.md tars/gcc-4.3-20070921/gcc/config/sh/sh.md
--- gcc-4.3-20070921/gcc/config/sh/sh.md 2007-10-24 12:09:31.000000000 +0530
+++ tars/gcc-4.3-20070921/gcc/config/sh/sh.md 2007-10-24 12:12:47.000000000 +0530
@@ -13684,7 +13684,7 @@ mov.l\\t1f,r0\\n\\
[(prefetch (match_operand 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n")
(match_operand:SI 2 "const_int_operand" "n"))]
- "(TARGET_HARD_SH4 || TARGET_SH5) && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP)"
+ "TARGET_SH2A || ((TARGET_HARD_SH4 || TARGET_SH5) && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP))"
"
{
if (GET_MODE (operands[0]) != Pmode
@@ -13695,6 +13695,14 @@ mov.l\\t1f,r0\\n\\
operands[0] = force_reg (Pmode, operands[0]);
}")
+(define_insn "prefetch_m2a"
+ [(prefetch (match_operand:SI 0 "register_operand" "r")
+ (match_operand:SI 1 "const_int_operand" "n")
+ (match_operand:SI 2 "const_int_operand" "n"))]
+ "TARGET_SH2A"
+ "pref\\t@%0"
+ [(set_attr "type" "other")])
+
(define_insn "alloco_i"
[(set (mem:BLK (match_operand:QI 0 "cache_address_operand" "p"))
(unspec:BLK [(const_int 0)] UNSPEC_ALLOCO))]
diff -uprN gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-prefetch.c tars/gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-prefetch.c
--- gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-prefetch.c 1970-01-01 05:30:00.000000000 +0530
+++ tars/gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-prefetch.c 2007-10-24 12:12:17.000000000 +0530
@@ -0,0 +1,37 @@
+/* Testcase to check generation of a SH2A specific instruction PREF @Rm */
+
+/* { dg-do assemble {target sh*-*-*}} */
+/* { dg-options "-O0" } */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single
+ -m2a-single-only" } */
+/* { dg-final { scan-assembler "pref"} } */
+
+void
+opt (void)
+{
+ int *p, wk;
+ int data[100];
+
+ /* data prefetch , instructions hit the cache. */
+
+ __builtin_prefetch (&data[0], 0, 0);
+ __builtin_prefetch (&data[0], 0, 1);
+ __builtin_prefetch (&data[0], 0, 2);
+ __builtin_prefetch (&data[0], 0, 3);
+ __builtin_prefetch (&data[0], 1, 0);
+ __builtin_prefetch (&data[0], 1, 1);
+ __builtin_prefetch (&data[0], 1, 2);
+ __builtin_prefetch (&data[0], 1, 3);
+
+
+ for (p = &data[0]; p < &data[9]; p++)
+ {
+ if (*p > *(p + 1))
+ {
+ wk = *p;
+ *p = *(p + 1);
+ *(p + 1) = wk;
+ }
+ }
+}
+
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH,SH] Add SH2A new instructions 3/6
2007-10-25 12:46 [PATCH,SH] Add SH2A new instructions 3/6 Naveen H.S.
@ 2007-10-30 1:38 ` Kaz Kojima
0 siblings, 0 replies; 3+ messages in thread
From: Kaz Kojima @ 2007-10-30 1:38 UTC (permalink / raw)
To: naveen.hs; +Cc: gcc-patches, Anil.Paranjape, Prafulla.Thakare
"Naveen H.S." <naveen.hs@kpitcummins.com> wrote:
> Please find attached the modified patch "sh2a3.patch". This patch
> implements new instruction PREFETCH for SH2A target.
Looks fine, except for a few problems about coding standard.
Re-post the revised patch when the trunk returns to stage1.
Don't forget to describe how the patch is tested then.
> --- gcc-4.3-20070921/gcc/config/sh/sh.md 2007-10-24 12:09:31.000000000 +0530
> +++ tars/gcc-4.3-20070921/gcc/config/sh/sh.md 2007-10-24 12:12:47.000000000 +0530
> @@ -13684,7 +13684,7 @@ mov.l\\t1f,r0\\n\\
> [(prefetch (match_operand 0 "address_operand" "p")
> (match_operand:SI 1 "const_int_operand" "n")
> (match_operand:SI 2 "const_int_operand" "n"))]
> - "(TARGET_HARD_SH4 || TARGET_SH5) && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP)"
> + "TARGET_SH2A || ((TARGET_HARD_SH4 || TARGET_SH5) && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP))"
Long line.
"TARGET_SH2A || ((TARGET_HARD_SH4 || TARGET_SH5)
&& (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP))"
> @@ -13695,6 +13695,14 @@ mov.l\\t1f,r0\\n\\
> operands[0] = force_reg (Pmode, operands[0]);
> }")
>
> +(define_insn "prefetch_m2a"
> + [(prefetch (match_operand:SI 0 "register_operand" "r")
> + (match_operand:SI 1 "const_int_operand" "n")
> + (match_operand:SI 2 "const_int_operand" "n"))]
^^^^^^^^
Use a tab.
> --- gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-prefetch.c 1970-01-01 05:30:00.000000000 +0530
> +++ tars/gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-prefetch.c 2007-10-24 12:12:17.000000000 +0530
> @@ -0,0 +1,37 @@
> +/* Testcase to check generation of a SH2A specific instruction PREF @Rm */
Missing period.
> +/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single
> + -m2a-single-only" } */
A single line would be safer.
> + /* data prefetch , instructions hit the cache. */
^ ^ ^^
/* Data prefetch, instructions hit the cache. */
> 2007-10-25 Mukesh Srivastava <mukesh.srivastava@kpitcummins.com>
>
> * config/sh/sh.md (prefetch): Add condition for SH2A target.
> (prefetch_sh2a): New.
The style of the author line is wrong. Should be
200z-xx-yy Mukesh Srivastava <mukesh.srivastava@kpitcummins.com>
New testcase requires an entry in gcc/testsuite/ChangeLog.
Regards,
kaz
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH,SH] Add SH2A new instructions 3/6
@ 2008-03-19 6:53 Naveen H.S.
0 siblings, 0 replies; 3+ messages in thread
From: Naveen H.S. @ 2008-03-19 6:53 UTC (permalink / raw)
To: gcc-patches; +Cc: Kaz Kojima, Prafulla Thakare
[-- Attachment #1: Type: text/plain, Size: 1064 bytes --]
Hi Kaz,
>> Re-post the revised patch when the trunk returns to stage1.
Please find the revised patch attached "sh2a3.patch" as per the
suggestions. Thanks a lot for the valuable guidance.
>> Don't forget to describe how the patch is tested then.
The patch was tested using the C and C++ testsuite for all the SH2A
combinations.
ChangeLog
2008-03-19 Naveen.H.S <naveen.hs@kpitcummins.com>
* config/sh/sh.md (prefetch): Add condition for SH2A target.
(prefetch_sh2a): New.
* gcc.target/sh/sh2a-prefetch.c: New test.
Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Free download of GNU based tool-chains for Renesas' SH, H8, R8C, M16C
and M32C Series. The following site also offers free technical support
to its users. Visit http://www.kpitgnutools.com for details.
Latest versions of KPIT GNU tools were released on February 4, 2008.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[-- Attachment #2: sh2a3.patch --]
[-- Type: application/octet-stream, Size: 2162 bytes --]
--- /gcc/config/sh/sh.md 2008-03-18 10:34:57.000000000 +0530
+++ /gcc/config/sh/sh.md 2008-03-18 10:35:05.000000000 +0530
@@ -13716,7 +13716,8 @@ mov.l\\t1f,r0\\n\\
[(prefetch (match_operand 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n")
(match_operand:SI 2 "const_int_operand" "n"))]
- "(TARGET_HARD_SH4 || TARGET_SH5) && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP)"
+ "TARGET_SH2A || ((TARGET_HARD_SH4 || TARGET_SH5)
+ && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP))"
"
{
if (GET_MODE (operands[0]) != Pmode
@@ -13727,6 +13728,14 @@ mov.l\\t1f,r0\\n\\
operands[0] = force_reg (Pmode, operands[0]);
}")
+(define_insn "prefetch_m2a"
+ [(prefetch (match_operand:SI 0 "register_operand" "r")
+ (match_operand:SI 1 "const_int_operand" "n")
+ (match_operand:SI 2 "const_int_operand" "n"))]
+ "TARGET_SH2A"
+ "pref\\t@%0"
+ [(set_attr "type" "other")])
+
(define_insn "alloco_i"
[(set (mem:BLK (match_operand:QI 0 "cache_address_operand" "p"))
(unspec:BLK [(const_int 0)] UNSPEC_ALLOCO))]
--- /gcc/testsuite/gcc.target/sh/sh2a-prefetch.c 1970-01-01 05:30:00.000000000 +0530
+++ /gcc/testsuite/gcc.target/sh/sh2a-prefetch.c 2008-03-18 10:36:01.000000000 +0530
@@ -0,0 +1,35 @@
+/* Testcase to check generation of a SH2A specific instruction PREF @Rm. */
+/* { dg-do assemble {target sh*-*-*}} */
+/* { dg-options "-O0" } */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" } */
+/* { dg-final { scan-assembler "pref"} } */
+
+void
+opt (void)
+{
+ int *p, wk;
+ int data[100];
+
+ /* data prefetch , instructions hit the cache. */
+
+ __builtin_prefetch (&data[0], 0, 0);
+ __builtin_prefetch (&data[0], 0, 1);
+ __builtin_prefetch (&data[0], 0, 2);
+ __builtin_prefetch (&data[0], 0, 3);
+ __builtin_prefetch (&data[0], 1, 0);
+ __builtin_prefetch (&data[0], 1, 1);
+ __builtin_prefetch (&data[0], 1, 2);
+ __builtin_prefetch (&data[0], 1, 3);
+
+
+ for (p = &data[0]; p < &data[9]; p++)
+ {
+ if (*p > *(p + 1))
+ {
+ wk = *p;
+ *p = *(p + 1);
+ *(p + 1) = wk;
+ }
+ }
+}
+
^ permalink raw reply [flat|nested] 3+ messages in thread
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2007-10-25 12:46 [PATCH,SH] Add SH2A new instructions 3/6 Naveen H.S.
2007-10-30 1:38 ` Kaz Kojima
2008-03-19 6:53 Naveen H.S.
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