[PATCH,SH] Add SH2A new instructions 4/6

[PATCH,SH] Add SH2A new instructions 4/6

[Naveen H.S.]

[-- Attachment #1: Type: text/plain, Size: 1101 bytes --]

Hi Kaz,

>> Re-post the revised patch when the trunk returns to stage1.

Please find the revised patch attached "sh2a4.patch" as per the
suggestions. Thanks a lot for the valuable guidance.

>> Don't forget to describe how the patch is tested then.

The patch was tested using the C and C++ testsuite for all the SH2A
combinations.

2008-03-19  Naveen.H.S  <naveen.hs@kpitcummins.com>
            
	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
	possible.
	* config/sh/sh.md (xorsi_nott, xorsi3_movrt, nott, movrt): New
	insns.
	
	* gcc.target/sh/sh2a-movrt.c: New test.

Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA) 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	
Free download of GNU based tool-chains for Renesas' SH, H8, R8C, M16C	
and M32C Series. The following site also offers free technical support	
to its users. Visit http://www.kpitgnutools.com for details. 	
Latest versions of KPIT GNU tools were released on February 4, 2008.	
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	

[-- Attachment #2: sh2a4.patch --]
[-- Type: application/octet-stream, Size: 2660 bytes --]


--- /gcc/config/sh/sh.c	2008-03-18 10:34:57.000000000 +0530
+++ /gcc/config/sh/sh.c	2008-03-18 10:36:48.000000000 +0530
@@ -10590,6 +10590,9 @@ sh_expand_t_scc (enum rtx_code code, rtx
   val = INTVAL (sh_compare_op1);
   if ((code == EQ && val == 1) || (code == NE && val == 0))
     emit_insn (gen_movt (result));
+  else if (TARGET_SH2A && ((code == EQ && val == 0)
+			    || (code == NE && val == 1)))
+    emit_insn (gen_movrt (result));
   else if ((code == EQ && val == 0) || (code == NE && val == 1))
     {
       emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
--- /gcc/config/sh/sh.md	2008-03-18 10:36:41.000000000 +0530
+++ /gcc/config/sh/sh.md	2008-03-18 10:36:48.000000000 +0530
@@ -3326,6 +3326,24 @@ label:
 	xori	%1, %2, %0"
   [(set_attr "type" "arith_media")])
 
+;; Invert the T bit.
+(define_insn "xorsi_nott"
+  [(set (reg:SI T_REG)
+	(xor:SI (reg:SI T_REG)
+		(const_int 1)))]
+  "TARGET_SH2A"
+  "nott"
+  [(set_attr "type" "arith")])
+
+;; Store the complements of the T bit in a register.
+(define_insn "xorsi3_movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+	(xor:SI (reg:SI T_REG)
+		(const_int 1)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+  [(set_attr "type" "arith")])
+
 (define_insn "xordi3"
   [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
 	(xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r")
@@ -9545,6 +9563,26 @@ mov.l\\t1f,r0\\n\\
   "movt	%0"
   [(set_attr "type" "arith")])
 
+;; complements the T bit
+(define_insn "nott"
+  [(set (reg:SI T_REG)
+        (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
+        (const_int 1)
+        (const_int 0)))]
+  "TARGET_SH2A"
+  "nott"
+  [(set_attr "type" "arith")])
+
+;; complements the T bit and stores the result in a register
+(define_insn "movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+        (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
+        (const_int 1)
+        (const_int 0)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+   [(set_attr "type" "arith")])
+
 (define_expand "seq"
   [(set (match_operand:SI 0 "arith_reg_dest" "")
 	(match_dup 1))]

--- /gcc/testsuite/gcc.target/sh/sh2a-movrt.c	1970-01-01 05:30:00.000000000 +0530
+++ /gcc/testsuite/gcc.target/sh/sh2a-movrt.c	2008-03-18 10:37:51.000000000 +0530
@@ -0,0 +1,16 @@
+/* Testcase to check generation of a SH2A specific instruction for
+   'MOVRT Rn'.  */
+/* { dg-do assemble {target sh*-*-*}}  */
+/* { dg-options "-O1" }  */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" }  */
+/* { dg-final { scan-assembler "movrt"} }  */
+
+
+int
+foo (void)
+{
+  int a, b, g, stop;
+  if (stop = ((a + b) % 2 != g));
+  return stop;
+}
+

Re: [PATCH,SH] Add SH2A new instructions 4/6

[Kaz Kojima]

"Naveen H.S." <naveen.hs@kpitcummins.com> wrote:
> 2008-03-19  Naveen.H.S  <naveen.hs@kpitcummins.com>
>             
> 	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
> 	possible.
> 	* config/sh/sh.md (xorsi_nott, xorsi3_movrt, nott, movrt): New
> 	insns.
> 	
> 	* gcc.target/sh/sh2a-movrt.c: New test.

Could you add the testcase for nott?

http://gcc.gnu.org/ml/gcc-patches/2007-10/msg01774.html

Regards,
	kaz

RE: [PATCH,SH] Add SH2A new instructions 4/6

[Naveen H.S.]

Hi Kaz,

>> Could you add the testcase for nott?

MOVRT is the optimized form of NOTT as it inverts the T bit and also
stores the result in the specified register. Hence, we could not get
any testcase that only inverts the T bit. 

Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA) 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	
Free download of GNU based tool-chains for Renesas' SH, H8, R8C, M16C	
and M32C Series. The following site also offers free technical support	
to its users. Visit http://www.kpitgnutools.com for details. 	
Latest versions of KPIT GNU tools were released on February 4, 2008.	
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	

Re: [PATCH,SH] Add SH2A new instructions 4/6

[Kaz Kojima]

"Naveen H.S." <naveen.hs@kpitcummins.com> wrote:
>>> Could you add the testcase for nott?
> 
> MOVRT is the optimized form of NOTT as it inverts the T bit and also
> stores the result in the specified register. Hence, we could not get
> any testcase that only inverts the T bit. 

Then why you add "nott" and "xorsi_nott" insn definitions?

Regards,
	kaz

RE: [PATCH,SH] Add SH2A new instructions 4/6

[Naveen H.S.]

[-- Attachment #1: Type: text/plain, Size: 938 bytes --]

Hi Kaz,

>> Then why you add "nott" and "xorsi_nott" insn definitions?

Please find attached the modified patch "sh2a4.patch" that does not
include the "nott" and "xorsi_nott" insn definitions. 

2008-03-25  Naveen.H.S  <naveen.hs@kpitcummins.com>
            
	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
	possible.
	* config/sh/sh.md (xorsi3_movrt, movrt): New insns.
	
	* gcc.target/sh/sh2a-movrt.c: New test.

Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA) 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	
Free download of GNU based tool-chains for Renesas' SH, H8, R8C, M16C	
and M32C Series. The following site also offers free technical support	
to its users. Visit http://www.kpitgnutools.com for details. 	
Latest versions of KPIT GNU tools were released on February 4, 2008.	
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[-- Attachment #2: sh2a4.patch --]
[-- Type: application/octet-stream, Size: 2238 bytes --]

--- /gcc/config/sh/sh.c	2008-03-25 14:36:14.000000000 +0530
+++ /gcc/config/sh/sh.c	2008-03-25 14:37:25.000000000 +0530
@@ -10591,6 +10591,9 @@ sh_expand_t_scc (enum rtx_code code, rtx
   val = INTVAL (sh_compare_op1);
   if ((code == EQ && val == 1) || (code == NE && val == 0))
     emit_insn (gen_movt (result));
+  else if (TARGET_SH2A && ((code == EQ && val == 0)
+			    || (code == NE && val == 1)))
+    emit_insn (gen_movrt (result));
   else if ((code == EQ && val == 0) || (code == NE && val == 1))
     {
       emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
--- /gcc/config/sh/sh.md	2008-03-25 14:36:51.000000000 +0530
+++ /gcc/config/sh/sh.md	2008-03-25 14:38:04.000000000 +0530
@@ -3326,6 +3326,15 @@ label:
 	xori	%1, %2, %0"
   [(set_attr "type" "arith_media")])
 
+;; Store the complements of the T bit in a register.
+(define_insn "xorsi3_movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+	(xor:SI (reg:SI T_REG)
+		(const_int 1)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+  [(set_attr "type" "arith")])
+
 (define_insn "xordi3"
   [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
 	(xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r")
@@ -9545,6 +9554,16 @@ mov.l\\t1f,r0\\n\\
   "movt	%0"
   [(set_attr "type" "arith")])
 
+;; complements the T bit and stores the result in a register
+(define_insn "movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+        (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
+        (const_int 1)
+        (const_int 0)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+   [(set_attr "type" "arith")])
+
 (define_expand "seq"
   [(set (match_operand:SI 0 "arith_reg_dest" "")
 	(match_dup 1))]
--- /gcc/testsuite/gcc.target/sh/sh2a-movrt.c	1970-01-01 05:30:00.000000000 +0530
+++ /gcc/testsuite/gcc.target/sh/sh2a-movrt.c	2008-03-25 14:37:25.000000000 +0530
@@ -0,0 +1,16 @@
+/* Testcase to check generation of a SH2A specific instruction for
+   'MOVRT Rn'.  */
+/* { dg-do assemble {target sh*-*-*}}  */
+/* { dg-options "-O1" }  */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" }  */
+/* { dg-final { scan-assembler "movrt"} }  */
+
+
+int
+foo (void)
+{
+  int a, b, g, stop;
+  if (stop = ((a + b) % 2 != g));
+  return stop;
+}
+

Re: [PATCH,SH] Add SH2A new instructions 4/6

[Kaz Kojima]

"Naveen H.S." <naveen.hs@kpitcummins.com> wrote:
> Please find attached the modified patch "sh2a4.patch". This patch
> implements new instructions NOTT and MOVRT for SH2A target.

Looks fine, except for a few problems about coding standard
and the missing testcase for nott.
Re-post the revised patch when the trunk returns to stage1.
Don't forget to describe how the patch is tested then.

> --- gcc-4.3-20070921/gcc/config/sh/sh.c	2007-10-24 12:09:31.000000000 +0530
> +++ tars/gcc-4.3-20070921/gcc/config/sh/sh.c	2007-10-24 12:14:27.000000000 +0530
> @@ -10590,6 +10590,11 @@ sh_expand_t_scc (enum rtx_code code, rtx
>    val = INTVAL (sh_compare_op1);
>    if ((code == EQ && val == 1) || (code == NE && val == 0))
>      emit_insn (gen_movt (result));
> +  else if (TARGET_SH2A && ((code == EQ && val == 0)
> +			    || (code == NE && val == 1)))
> +    {
> +      emit_insn (gen_movrt (result));
> +    }

We don't use braces in this case.

> --- gcc-4.3-20070921/gcc/config/sh/sh.md	2007-10-24 12:14:16.000000000 +0530
> +++ tars/gcc-4.3-20070921/gcc/config/sh/sh.md	2007-10-24 12:15:34.000000000 +0530
> @@ -3320,6 +3320,24 @@ label:
>  	xori	%1, %2, %0"
>    [(set_attr "type" "arith_media")])
>  
> +;; complements the T bit

This comment should be an English sentence like

;; Invert the T bit.

+(define_insn "xorsi_nott"
+  [(set (reg:SI T_REG)
+        (xor:SI (reg:SI T_REG)
+                (const_int 1)))]
  ^^^^^^^^
Use a tab.

> +;; complements the T bit and stores the result in a register

;; Store the complements of the T bit in a register.

> +(define_insn "xorsi3_movrt"
> +  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
> +        (xor:SI (reg:SI T_REG)
> +                (const_int 1)))]
    ^^^^^^^^
Use a tab.

> @@ -9535,6 +9553,26 @@ mov.l\\t1f,r0\\n\\
>    "movt	%0"
>    [(set_attr "type" "arith")])
>  
> +;; complements the T bit

Same as above

> +;; complements the T bit and stores the result in a register

and here.

> --- gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-movrt.c	1970-01-01 05:30:00.000000000 +0530
> +++ tars/gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-movrt.c	2007-10-24 12:16:53.000000000 +0530
> @@ -0,0 +1,18 @@
> +/* Testcase to check generation of a SH2A specific instruction for
> +   "MOVRT Rn"  */

Missing period.

> +/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single
> +   -m2a-single-only" }  */

A single line would be safer.

> 2007-10-25	Naveen.H.S naveen.hs@kpitcummins.com
>             
> 	* config/sh/sh.c (sh_expand_t_scc): Generate MOVRT for a
> specific
> 	condition for SH2A target.
> 	* config/sh/sh.md : xorsi_nott, xorsi3_movrt, nott, movrt : New.

The style of this entry is wrong.  Should be

200z-xx-yy  Naveen.H.S  <naveen.hs@kpitcummins.com>
            
	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if possible.
	* config/sh/sh.md (xorsi_nott, xorsi3_movrt, nott, movrt): New insns.

New testcase requires an entry in gcc/testsuite/ChangeLog.

Regards,
	kaz

Re: [PATCH,SH] Add SH2A new instructions 4/6

[Naveen H.S.]

[-- Attachment #1: Type: text/plain, Size: 876 bytes --]

Hi,

Please find attached the modified patch "sh2a4.patch". This patch
implements 
new instructions NOTT and MOVRT for SH2A target.

ChangeLog
2007-10-25	Naveen.H.S naveen.hs@kpitcummins.com
            
	* config/sh/sh.c (sh_expand_t_scc): Generate MOVRT for a
specific
	condition for SH2A target.
	* config/sh/sh.md : xorsi_nott, xorsi3_movrt, nott, movrt : New.

Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA) 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	
Free download of GNU based tool-chains for Renesas' SH, H8, R8C, M16C	
and M32C Series. The following site also offers free technical support	
to its users. Visit http://www.kpitgnutools.com for details. 	
Latest versions of KPIT GNU tools were released on October 1, 2007.	
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	


[-- Attachment #2: sh2a4.patch --]
[-- Type: application/octet-stream, Size: 3153 bytes --]

diff -upr gcc-4.3-20070921/gcc/config/sh/sh.c tars/gcc-4.3-20070921/gcc/config/sh/sh.c
--- gcc-4.3-20070921/gcc/config/sh/sh.c	2007-10-24 12:09:31.000000000 +0530
+++ tars/gcc-4.3-20070921/gcc/config/sh/sh.c	2007-10-24 12:14:27.000000000 +0530
@@ -10590,6 +10590,11 @@ sh_expand_t_scc (enum rtx_code code, rtx
   val = INTVAL (sh_compare_op1);
   if ((code == EQ && val == 1) || (code == NE && val == 0))
     emit_insn (gen_movt (result));
+  else if (TARGET_SH2A && ((code == EQ && val == 0)
+			    || (code == NE && val == 1)))
+    {
+      emit_insn (gen_movrt (result));
+    }
   else if ((code == EQ && val == 0) || (code == NE && val == 1))
     {
       emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
diff -upr gcc-4.3-20070921/gcc/config/sh/sh.md tars/gcc-4.3-20070921/gcc/config/sh/sh.md
--- gcc-4.3-20070921/gcc/config/sh/sh.md	2007-10-24 12:14:16.000000000 +0530
+++ tars/gcc-4.3-20070921/gcc/config/sh/sh.md	2007-10-24 12:15:34.000000000 +0530
@@ -3320,6 +3320,24 @@ label:
 	xori	%1, %2, %0"
   [(set_attr "type" "arith_media")])
 
+;; complements the T bit
+(define_insn "xorsi_nott"
+  [(set (reg:SI T_REG)
+        (xor:SI (reg:SI T_REG)
+                (const_int 1)))]
+  "TARGET_SH2A"
+  "nott"
+  [(set_attr "type" "arith")])
+
+;; complements the T bit and stores the result in a register
+(define_insn "xorsi3_movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+        (xor:SI (reg:SI T_REG)
+                (const_int 1)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+  [(set_attr "type" "arith")])
+
 (define_insn "xordi3"
   [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
 	(xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r")
@@ -9535,6 +9553,26 @@ mov.l\\t1f,r0\\n\\
   "movt	%0"
   [(set_attr "type" "arith")])
 
+;; complements the T bit
+(define_insn "nott"
+  [(set (reg:SI T_REG)
+        (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
+        (const_int 1)
+        (const_int 0)))]
+  "TARGET_SH2A"
+  "nott"
+  [(set_attr "type" "arith")])
+
+;; complements the T bit and stores the result in a register
+(define_insn "movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+        (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
+        (const_int 1)
+        (const_int 0)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+   [(set_attr "type" "arith")])
+
 (define_expand "seq"
   [(set (match_operand:SI 0 "arith_reg_dest" "")
 	(match_dup 1))]
diff -uprN gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-movrt.c tars/gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-movrt.c
--- gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-movrt.c	1970-01-01 05:30:00.000000000 +0530
+++ tars/gcc-4.3-20070921/gcc/testsuite/gcc.target/sh/sh2a-movrt.c	2007-10-24 12:16:53.000000000 +0530
@@ -0,0 +1,18 @@
+/* Testcase to check generation of a SH2A specific instruction for
+   "MOVRT Rn"  */
+
+/* { dg-do assemble {target sh*-*-*}}  */
+/* { dg-options "-O1" }  */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single
+   -m2a-single-only" }  */
+/* { dg-final { scan-assembler "movrt"} }  */
+
+
+int
+foo (void)
+{
+  int a, b, g, stop;
+  if (stop = ((a + b) % 2 != g));
+  return stop;
+}
+