From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1118 invoked by alias); 9 Jun 2010 15:02:01 -0000 Received: (qmail 1050 invoked by uid 22791); 9 Jun 2010 15:02:00 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 09 Jun 2010 15:01:54 +0000 Received: (qmail 30060 invoked from network); 9 Jun 2010 15:01:53 -0000 Received: from unknown (HELO wren.localnet) (paul@127.0.0.2) by mail.codesourcery.com with ESMTPA; 9 Jun 2010 15:01:53 -0000 From: Paul Brook To: gcc-patches@gcc.gnu.org Subject: [PATCH, appplied] ARM Cortex-M3 CPU Date: Wed, 09 Jun 2010 15:09:00 -0000 User-Agent: KMail/1.13.3 (Linux/2.6.33-2-amd64; KDE/4.4.4; x86_64; ; ) MIME-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_ny6DMUvDnuzJDt4" Message-Id: <201006091600.55311.paul@codesourcery.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2010-06/txt/msg00941.txt.bz2 --Boundary-00=_ny6DMUvDnuzJDt4 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-length: 465 The attached patch adds nominal support for the ARM Cortex-M4 CPU core. All the interesting bits are already there, this just adds the cpu name. Tested on arm-none-eabi. Applied to SVN trunk. Paul 2010-10-09 Paul Brook gcc/ * doc/invoke.texi: Document ARM -mcpu=cortex-m4. * config/arm/arm.c (all_architectures): Change v7e-m default to cortexm4. * config/arm/arm-cores.def: Add cortex-m4. * config/arm/arm-tune.md: Regenerate. --Boundary-00=_ny6DMUvDnuzJDt4 Content-Type: text/x-patch; charset="us-ascii"; name="patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="patch" Content-length: 2257 Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi (revision 160360) +++ gcc/doc/invoke.texi (working copy) @@ -9912,7 +9912,7 @@ assembly code. Permissible names are: @ @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp}, @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, @samp{cortex-a5}, @samp{cortex-a8}, @samp{cortex-a9}, -@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m3}, +@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m4}, @samp{cortex-m3}, @samp{cortex-m1}, @samp{cortex-m0}, @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 160360) +++ gcc/config/arm/arm.c (working copy) @@ -806,7 +806,7 @@ static const struct processors all_archi {"armv7-a", cortexa8, "7A", FL_CO_PROC | FL_FOR_ARCH7A, NULL}, {"armv7-r", cortexr4, "7R", FL_CO_PROC | FL_FOR_ARCH7R, NULL}, {"armv7-m", cortexm3, "7M", FL_CO_PROC | FL_FOR_ARCH7M, NULL}, - {"armv7e-m", cortexm3, "7EM", FL_CO_PROC | FL_FOR_ARCH7EM, NULL}, + {"armv7e-m", cortexm4, "7EM", FL_CO_PROC | FL_FOR_ARCH7EM, NULL}, {"ep9312", ep9312, "4T", FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL}, {"iwmmxt", iwmmxt, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL}, {"iwmmxt2", iwmmxt2, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL}, Index: gcc/config/arm/arm-cores.def =================================================================== --- gcc/config/arm/arm-cores.def (revision 160360) +++ gcc/config/arm/arm-cores.def (working copy) @@ -123,6 +123,7 @@ ARM_CORE("cortex-a8", cortexa8, 7A, ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, 9e) ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e) ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e) +ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, 9e) ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e) ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e) ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e) --Boundary-00=_ny6DMUvDnuzJDt4--