From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11936 invoked by alias); 14 Feb 2011 18:57:45 -0000 Received: (qmail 11927 invoked by uid 22791); 14 Feb 2011 18:57:45 -0000 X-SWARE-Spam-Status: No, hits=-1.4 required=5.0 tests=AWL,BAYES_00,NO_DNS_FOR_FROM,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga03.intel.com (HELO mga03.intel.com) (143.182.124.21) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 14 Feb 2011 18:57:40 +0000 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 14 Feb 2011 10:57:39 -0800 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by azsmga001.ch.intel.com with ESMTP; 14 Feb 2011 10:57:39 -0800 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id DA062180B21; Mon, 14 Feb 2011 10:57:38 -0800 (PST) Date: Mon, 14 Feb 2011 19:04:00 -0000 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Subject: [x32] PATCH: PR middle-end/47725: [x32] error: unable to find a register to spill in class DIREG Message-ID: <20110214185738.GA13004@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-02/txt/msg00910.txt.bz2 Hi, cant_combine_insn_p won't check ZERO_EXTEND and SIGN_EXTEND. This patch helps cant_combine_insn_p by copying the arg in the incoming mode and extending the copy instead of the arg. OK for trunk when stage 1 is open? Thanks. H.J. --- Index: gcc/testsuite/ChangeLog.x32 =================================================================== --- gcc/testsuite/ChangeLog.x32 (revision 170144) +++ gcc/testsuite/ChangeLog.x32 (working copy) @@ -1,5 +1,10 @@ 2011-02-13 H.J. Lu + PR middle-end/47725 + * gcc.dg/torture/pr47725.c: New. + +2011-02-13 H.J. Lu + PR target/47715 * gcc.target/i386/pr47715-3.c: New. Index: gcc/testsuite/gcc.dg/torture/pr47725.c =================================================================== --- gcc/testsuite/gcc.dg/torture/pr47725.c (revision 0) +++ gcc/testsuite/gcc.dg/torture/pr47725.c (revision 0) @@ -0,0 +1,16 @@ +/* { dg-do compile } */ + +struct _Unwind_Context +{ + void *reg[17]; + void *ra; +}; +extern void bar (struct _Unwind_Context *); +void +__frame_state_for (void *pc_target) +{ + struct _Unwind_Context context; + __builtin_memset (&context, 0, sizeof (struct _Unwind_Context)); + context.ra = pc_target; + bar (&context); +} Index: gcc/function.c =================================================================== --- gcc/function.c (revision 170144) +++ gcc/function.c (working copy) @@ -3004,6 +3004,14 @@ assign_parm_setup_reg (struct assign_par HARD_REG_SET hardregs; start_sequence (); + if (REG_P (op1) && REGNO (op1) < FIRST_PSEUDO_REGISTER) + { + /* We must copy the hard register first before extending + it. Otherwise, combine won't see the hard register. */ + rtx copy = gen_reg_rtx (data->passed_mode); + emit_move_insn (copy, op1); + op1 = copy; + } insn = gen_extend_insn (op0, op1, promoted_nominal_mode, data->passed_mode, unsignedp); emit_insn (insn); Index: gcc/ChangeLog.x32 =================================================================== --- gcc/ChangeLog.x32 (revision 170146) +++ gcc/ChangeLog.x32 (working copy) @@ -1,3 +1,9 @@ +2011-02-14 H.J. Lu + + PR middle-end/47725 + * function.c (assign_parm_setup_reg): Copy the hard register + first before extending it. + 2011-02-13 H.J. Lu PR target/47715