From: Julian Brown <julian@codesourcery.com>
To: gcc-patches@gcc.gnu.org
Cc: paul@codesourcery.com, rearnsha@arm.com,
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
Subject: [PATCH, ARM] Make usage of MOVT/MOVW pairs (vs. constant pool) a tunable parameter
Date: Wed, 01 Jun 2011 15:24:00 -0000 [thread overview]
Message-ID: <20110601162404.5c821984@rex.config> (raw)
[-- Attachment #1: Type: text/plain, Size: 1182 bytes --]
This patch allows the usage of MOVT/MOVW pairs (vs. constant-pool loads)
to be controlled based on the target CPU (-mtune= option), using the ARM
backend's tuning infrastructure. This is to enable constant-pool loads
to be used in preference to MOVW/MOVT instruction pairs, when the
former are faster for a given core.
This patch just adds the field to the tuning structure, and adds
(dummy) tuning structures. There should be no effective change in
behaviour.
Testing has not yet completed (but isn't expected to show up anything
untoward). OK to apply?
Thanks,
Julian
ChangeLog
gcc/
* arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 tuning.
(cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4)
(cortex-m3, cortex-m1, cortex-m0): Use cortex tuning.
* config/arm/arm-protos.h (tune_params): Add prefer_constant_pool
field.
* config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune)
(arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune)
(arm_fa726te_tune): Add prefer_constant_pool setting.
(arm_v6t2_tune, arm_cortex_tune): New.
* config/arm/arm.h (TARGET_USE_MOVT): Make dependent on
prefer_constant_pool setting.
[-- Attachment #2: const-pool-tunable-1.diff --]
[-- Type: text/x-patch, Size: 5194 bytes --]
commit 98c2f384567c54f41244b8869b31d15662afe95e
Author: Julian Brown <julian@henry7.codesourcery.com>
Date: Fri May 27 10:00:00 2011 -0700
Make usage of constant pool (vs movt) a tunable parameter.
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 0bb9aa3..b315df7 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -122,15 +122,15 @@ ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e)
ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, 9e)
-ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, 9e)
-ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, 9e)
+ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2)
+ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2)
+ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex)
+ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex)
ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9)
-ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED, 9e)
-ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e)
-ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e)
-ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, 9e)
-ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e)
-ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e)
-ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e)
+ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED, cortex)
+ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex)
+ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex)
+ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex)
+ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex)
+ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, cortex)
+ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, cortex)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index fa25283..8e0d54d 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -224,6 +224,7 @@ struct tune_params
int num_prefetch_slots;
int l1_cache_size;
int l1_cache_line_size;
+ bool prefer_constant_pool;
};
extern const struct tune_params *current_tune;
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1eda45e..8c8982d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -854,48 +854,73 @@ const struct tune_params arm_slowmul_tune =
{
arm_slowmul_rtx_costs,
NULL,
- 3,
- ARM_PREFETCH_NOT_BENEFICIAL
+ 3, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ true /* Prefer constant pool. */
};
const struct tune_params arm_fastmul_tune =
{
arm_fastmul_rtx_costs,
NULL,
- 1,
- ARM_PREFETCH_NOT_BENEFICIAL
+ 1, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ true /* Prefer constant pool. */
};
const struct tune_params arm_xscale_tune =
{
arm_xscale_rtx_costs,
xscale_sched_adjust_cost,
- 2,
- ARM_PREFETCH_NOT_BENEFICIAL
+ 2, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ true /* Prefer constant pool. */
};
const struct tune_params arm_9e_tune =
{
arm_9e_rtx_costs,
NULL,
- 1,
- ARM_PREFETCH_NOT_BENEFICIAL
+ 1, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ true /* Prefer constant pool. */
+};
+
+const struct tune_params arm_v6t2_tune =
+{
+ arm_9e_rtx_costs,
+ NULL,
+ 1, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ false /* Prefer constant pool. */
+};
+
+/* Generic Cortex tuning. Use more specific tunings if appropriate. */
+const struct tune_params arm_cortex_tune =
+{
+ arm_9e_rtx_costs,
+ NULL,
+ 1, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ false /* Prefer constant pool. */
};
const struct tune_params arm_cortex_a9_tune =
{
arm_9e_rtx_costs,
cortex_a9_sched_adjust_cost,
- 1,
- ARM_PREFETCH_BENEFICIAL(4,32,32)
+ 1, /* Constant limit. */
+ ARM_PREFETCH_BENEFICIAL(4,32,32),
+ false /* Prefer constant pool. */
};
const struct tune_params arm_fa726te_tune =
{
arm_9e_rtx_costs,
fa726te_sched_adjust_cost,
- 1,
- ARM_PREFETCH_NOT_BENEFICIAL
+ 1, /* Constant limit. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
+ true /* Prefer constant pool. */
};
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 86d842d..62a814b 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -269,7 +269,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
(TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em))
/* Should MOVW/MOVT be used in preference to a constant pool. */
-#define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size)
+#define TARGET_USE_MOVT \
+ (arm_arch_thumb2 && !optimize_size && !current_tune->prefer_constant_pool)
/* We could use unified syntax for arm mode, but for now we just use it
for Thumb-2. */
next reply other threads:[~2011-06-01 15:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-01 15:24 Julian Brown [this message]
2011-06-01 15:56 ` Richard Earnshaw
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