From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5457 invoked by alias); 1 Jul 2011 15:53:35 -0000 Received: (qmail 5431 invoked by uid 22791); 1 Jul 2011 15:53:34 -0000 X-SWARE-Spam-Status: No, hits=-0.9 required=5.0 tests=AWL,BAYES_00,T_HK_NAME_DR X-Spam-Check-By: sourceware.org Received: from mtagate4.uk.ibm.com (HELO mtagate4.uk.ibm.com) (194.196.100.164) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 01 Jul 2011 15:53:17 +0000 Received: from d06nrmr1307.portsmouth.uk.ibm.com (d06nrmr1307.portsmouth.uk.ibm.com [9.149.38.129]) by mtagate4.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p61FrFIT008959 for ; Fri, 1 Jul 2011 15:53:15 GMT Received: from d06av09.portsmouth.uk.ibm.com (d06av09.portsmouth.uk.ibm.com [9.149.37.250]) by d06nrmr1307.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p61FrF2L2371836 for ; Fri, 1 Jul 2011 16:53:15 +0100 Received: from d06av09.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av09.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p61FrFEe004755 for ; Fri, 1 Jul 2011 09:53:15 -0600 Received: from davesworkthinkpad (davegilbertthinkpad.manchester-maybrook.uk.ibm.com [9.174.219.90]) by d06av09.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id p61Fquxt004086 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NO) for ; Fri, 1 Jul 2011 09:53:15 -0600 Date: Fri, 01 Jul 2011 15:53:00 -0000 From: "Dr. David Alan Gilbert" To: gcc-patches@gcc.gnu.org Subject: [Patch 0/3] ARM 64 bit atomic operations Message-ID: <20110701155254.GA5242@davesworkthinkpad> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-06-14) X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-07/txt/msg00050.txt.bz2 Hi, This is a series of 3 patches relating to ARM atomic operations. 1) Provide 64 bit atomic operations using the new ldrexd/strexd in ARMv6k and above. 2) Provide fallbacks so that when compiled for earlier CPUs a Linux kernel asssist is called (as per 32bit and smaller ops) 3) Fix pr48126 which is a misplaced barrier in the atomic generation Many thanks to Richard Sandiford for pointing me in the right direction and reviewing it. This work is part of Linaro blueprint: https://blueprints.launchpad.net/linaro-toolchain-misc/+spec/64-bit-sync-primitives The patch was generated from the gcc git tree from about 2 weeks back but applies happily on top of the head. It's been tested cross to ARM from x86 and also a native x86 build & test. Dave