* [SPARC] Fix PR target/49660
@ 2011-07-07 20:56 Eric Botcazou
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From: Eric Botcazou @ 2011-07-07 20:56 UTC (permalink / raw)
To: gcc-patches
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This is the glitch reported by Rainer for the 64-bit compiler on SPARC/Solaris,
where we pass -mcpu=v9 in 32-bit mode but this nevertheless doesn't cause the
V8+ architecture to be selected, unlike for the 32-bit compiler.
Tested on SPARC/Solaris and SPARC64/Solaris, applied on the mainline, and on
the 4.6 and 4.5 branches for the second patch.
2011-07-07 Eric Botcazou <ebotcazou@adacore.com>
PR target/49660
* config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Add
MASK_V8PLUS, remove commented out flag and reorder.
2011-07-07 Eric Botcazou <ebotcazou@adacore.com>
PR target/49660
* config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Add
MASK_V8PLUS, remove commented out flag and reorder.
Backport from mainline
2011-06-28 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config/sparc/sol2-64.h (TARGET_DEFAULT): Remove.
(TARGET_64BIT_DEFAULT): Define.
* config.gcc (sparc*-*-solaris2*): Move sparc/sol2-64.h to front
of tm_file.
* config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Define.
2011-07-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* gcc.target/sparc/cas64.c: New test.
--
Eric Botcazou
[-- Attachment #2: pr49660.diff --]
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Index: config/sparc/sol2.h
===================================================================
--- config/sparc/sol2.h (revision 175840)
+++ config/sparc/sol2.h (working copy)
@@ -20,16 +20,17 @@ You should have received a copy of the G
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
+/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
+ sparc_override_options will disable V8+ if either not generating V9 code
+ or generating 64-bit code. */
#undef TARGET_DEFAULT
#ifdef TARGET_64BIT_DEFAULT
#define TARGET_DEFAULT \
- (MASK_V9 + MASK_PTR64 + MASK_64BIT /* + MASK_HARD_QUAD */ + \
- MASK_STACK_BIAS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
+ (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
+ MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
#else
-/* Solaris allows 64 bit out and global registers in 32 bit mode.
- sparc_override_options will disable V8+ if not generating V9 code. */
-#define TARGET_DEFAULT (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU \
- + MASK_LONG_DOUBLE_128)
+#define TARGET_DEFAULT \
+ (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
#endif
/* The default code model used to be CM_MEDANY on Solaris
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Index: config.gcc
===================================================================
--- config.gcc (revision 175526)
+++ config.gcc (working copy)
@@ -2571,7 +2571,7 @@ sparc*-*-solaris2*)
tm_file="${tm_file} sparc/sol2.h"
case ${target} in
sparc64-*-* | sparcv9-*-*)
- tm_file="${tm_file} sparc/sol2-64.h"
+ tm_file="sparc/sol2-64.h ${tm_file}"
;;
*)
test x$with_cpu != x || with_cpu=v9
Index: config/sparc/sol2-64.h
===================================================================
--- config/sparc/sol2-64.h (revision 175526)
+++ config/sparc/sol2-64.h (working copy)
@@ -1,7 +1,7 @@
/* Definitions of target machine for GCC, for bi-arch SPARC
running Solaris 2, defaulting to 64-bit code generation.
- Copyright (C) 1999, 2010 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2010, 2011 Free Software Foundation, Inc.
This file is part of GCC.
@@ -19,7 +19,4 @@ You should have received a copy of the G
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-#undef TARGET_DEFAULT
-#define TARGET_DEFAULT \
- (MASK_V9 + MASK_PTR64 + MASK_64BIT /* + MASK_HARD_QUAD */ + \
- MASK_STACK_BIAS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
+#define TARGET_64BIT_DEFAULT 1
Index: config/sparc/sol2.h
===================================================================
--- config/sparc/sol2.h (revision 175526)
+++ config/sparc/sol2.h (working copy)
@@ -153,11 +153,18 @@ along with GCC; see the file COPYING3.
#undef SUN_INTEGER_MULTIPLY_64
#define SUN_INTEGER_MULTIPLY_64 1
-/* Solaris allows 64 bit out and global registers in 32 bit mode.
- sparc_override_options will disable V8+ if not generating V9 code. */
+/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
+ sparc_override_options will disable V8+ if either not generating V9 code
+ or generating 64-bit code. */
#undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU \
- + MASK_LONG_DOUBLE_128)
+#ifdef TARGET_64BIT_DEFAULT
+#define TARGET_DEFAULT \
+ (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
+ MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
+#else
+#define TARGET_DEFAULT \
+ (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
+#endif
/* Solaris-specific #pragmas are implemented on top of attributes. Hook in
the bits from config/sol2.c. */
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/* PR target/49660 */
/* { dg-do compile { target sparc*-*-solaris2.* } } */
#include <stdint.h>
extern int64_t *val, old, new;
int
cas64 (void)
{
return __sync_bool_compare_and_swap (val, old, new);
}
/* { dg-final { scan-assembler-not "compare_and_swap_8" } } */
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2011-07-07 20:56 [SPARC] Fix PR target/49660 Eric Botcazou
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